Hardware & Silicon Validation Senior Staff Engineer

TL;DR

Hardware & Silicon Validation Senior Staff Engineer: Ensuring the quality, reliability, and performance of next-generation data center ASIC and SoC products with an accent on functional hardware validation, electrical characterization, and high-speed SERDES validation. Focus on validating complex, high-performance silicon and platforms across a wide range of critical technologies and interfaces.

Location: Santa Clara, CA

Salary: 127,630 - 191,200 USD per annum

Company

hirify.global’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world.

What you will do

• Architect and design high‑performance board‑level systems for compute, networking, and storage applications.
• Define, review, and approve schematics and PCB layouts, with strong emphasis on signal integrity, power integrity, and high‑speed design best practices.
• Lead the selection, implementation, and optimization of high‑speed interfaces, including PCIe Gen6, DDR4 / DDR5, 10G / 25G / 100G / 200G Ethernet.
• Perform and interpret signal integrity (SI) and power integrity (PI) simulations and analyses using industry‑standard tools.
• Collaborate closely with silicon, firmware, mechanical, thermal, validation, and manufacturing teams to ensure system‑level design optimization and seamless integration.
• Engage directly with customers to develop and support reference designs, incorporating feedback to influence architecture and design decisions.

Requirements

• Bachelor’s degree in Computer Science, Electrical Engineering, or a related field with 5–10 years of relevant industry experience; or Master’s degree and/or PhD in Computer Science, Electrical Engineering, or a related discipline with 3–5 years of professional experience.
• Strong understanding of PCB design fundamentals, including schematic capture, component placement, routing, stack‑up definition, and design for manufacturability (DFM) and testability (DFT).
• Experience with industry‑standard EDA tools for board design (e.g., Cadence Allegro/OrCAD, Altium Designer, Mentor Xpedition, or equivalent).
• Solid knowledge of high‑speed digital design concepts, including controlled‑impedance routing, signal integrity, timing constraints, and differential pair routing.
• Ability to interpret datasheets, reference designs, and electrical specifications to implement robust and compliant board designs.
• Hands‑on experience supporting board bring‑up and debug, working closely with validation, silicon, and system teams.

Nice to have

• Familiarity with power integrity, PDN design, decoupling strategies, and low‑noise analog layout techniques.
• Experience designing boards incorporating high‑speed interfaces such as PCIe, USB, Ethernet, DDR memory, or SerDes technologies.
• Exposure to board‑level simulation or analysis tools for signal integrity (SI), power integrity (PI), or thermal analysis.

Culture & Benefits

• Employee stock purchase plan with a 2-year look back.
• Family support programs to help balance work and home life.
• Robust mental health resources to prioritize emotional well-being.
• Recognition and service awards to celebrate contributions and milestones.