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24 часа назад

R&D Engineer Adv Tech Dev (PKE) / Sr. Staff (Semiconductors)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Singapore
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR

R&D Engineer Adv Tech Dev (PKE) / Sr. Staff (Semiconductors): Work with marketing, IC design, and engineering teams to select and design optimum package solutions for advanced silicon nodes (5nm, 3nm, 2nm+) with an accent on cost, performance, manufacturability, and reliability. Focus on researching new materials, managing packaging from concept to high-volume production, and troubleshooting advanced technology issues.

Location: Singapore - Yishun (Full time onsite)

Company

Global technology leader that designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions.

What you will do

  • Work with business unit marketing and IC design teams to select optimum package solutions balancing cost, performance, manufacturability, and reliability for new advanced silicon products.
  • Collaborate with IC design, system design, SI/PI, and thermal teams to design custom packages meeting stringent CPI, SI/PI, and thermal requirements.
  • Research, develop, and productize new materials like TIM, build-up-film, and underfill for advanced node silicon POR.
  • Manage IC packaging activities from concept through development, qualification, and high-volume production.
  • Define assembly BOM, processes, troubleshoot packaging issues, and create design documentation.
  • Interface with suppliers, QA, customers, and operations groups for new product bring-up, qualification, production ramp, and issue resolution.

Requirements

  • BS/MS/PhD in STEM/Material Science/Electrical/Mechanical Engineering; BS +8 years, MS +6 years, or PhD +3 years experience.
  • Deep understanding of signal integrity, power integrity (impedance, s-parameters, power plane optimization).
  • Strong expertise in Cadence APD for custom substrate design and hands-on advanced assembly processes (flipchip, MCM, 2.5D for 5nm+ nodes).
  • Good knowledge of CPI-related materials, wafer BEOL, advanced substrate manufacturing (SAP/mSAP, PSPI w/ Cu RDL), and failure analysis on advanced nodes.
  • Conceptual knowledge of package cost structure, GD&T, mechanical drawings, manufacturing/quality fundamentals (DOE, process capability).
  • Strong project management, communication, leadership skills; ability to grow across multiple disciplines.

Nice to have

  • Track record of innovation via journal publications or patents.
  • Familiarity with advanced technologies like 2.5D, 3DIC, glass substrates.

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