Soc Firmware Engineering Manager (Ai)

TL;DR

Soc Firmware Engineering Manager (AI): Managing a team responsible for the lowest layer of user-space software on AWS's custom ML accelerator chips, including firmware that boots, configures, and manages every hardware block on the SoC with an accent on register-level HW/SW interactions and code reviews. Focus on debugging register-level issues, driving the architecture of C++ template metaprogramming framework, and ensuring the software is stateless and survives live-updates on running production servers.

Location: Cupertino, CA or Austin, TX

Salary: USA, CA, Cupertino - 212,700.00 - 287,700.00 USD annually; USA, TX, Austin - 184,900.00 - 250,200.00 USD annually

Company

hirify.global is a multinational technology company that focuses on e-commerce, cloud computing, online advertising, digital streaming, and artificial intelligence.

What you will do

• Manage, coach, and grow a team of 6 engineers, setting technical direction and owning hiring.
• Coordinate deliverables across chip architects, RTL designers, verification engineers, validation engineers, and platform software teams.
• Own bring-up for new SoC tape-outs, from first-silicon power-on through production fleet deployment.
• Prioritize work across multiple concurrent chip programs and customer teams, balancing urgent bring-up needs against long-term architecture investments.
• Drive the architecture of our C++ template metaprogramming framework, BUTR (Built-in Unit Test for Registers), and HITL (Hardware-in-the-Loop) test infrastructure.
• Debug register-level HW/SW interactions, review code, and write code yourself when it matters.

Requirements

• 3+ years of engineering team management experience.
• 7+ years of professional software development in C or C++, including embedded, firmware, or systems-level development.
• 4+ years of designing or architecting software systems (abstraction layers, hardware/software interfaces).
• Experience developing software that interfaces directly with hardware: SoC, ASIC, FPGA, or embedded microcontrollers.
• Experience with register-level programming and hardware debug (waveform analysis, bus-level tracing, or similar).

Nice to have

• Experience in recruiting, hiring, mentoring/coaching and managing teams of Software Engineers to improve their skills, and make them more effective, product software engineers.
• Experience with silicon bring-up or pre/post-silicon software validation.
• Experience shipping software across multiple target platforms (simulation, emulation, production hardware).
• Familiarity with bus protocols (APB, AXI, PCIe) or memory subsystems (HBM, DDR).
• Experience with C++ template metaprogramming or code generation frameworks.
• Experience building or maintaining hardware abstraction layers or board support packages.

Culture & Benefits

• hirify.global offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage).
• 401(k) matching, paid time off, and parental leave.
• Our inclusive culture empowers hirify.globalians to deliver the best results for our customers.