Senior DfT Engineer (VLSI)

Location: Thessaloniki or Athens, Greece

Company

hirify.global is a global leader in consulting, technology services, and digital transformation.

What you will do

• Implement DFT in line with existing test methodologies for advanced process nodes.
• Perform top and block-level DFT insertion, including scan compression, JTAG, ATPG, and MBIST/LBIST.
• Collaborate with the physical design team to resolve timing constraints and issues.
• Verify DFT circuitry, interface with other components/IPs, and debug timing simulation issues.
• Improve and debug critical DFT KPIs, specifically test coverage and pattern efficiency.
• Execute silicon bring-up, diagnosis, and support for physical failure analysis.

Requirements

• 6+ years of hands-on experience with DFT and test flows for large and complex SOCs using commercial EDA tools.
• Strong fundamental knowledge of JTAG, ATPG, yield learning, logic diagnosis, Scan compression, IEEE 1500 Std., and MBIST/LBIST.
• Experience with EDA providers such as Synopsys (DFT Compiler, Tetramax, VCS) or Siemens/Mentor (Tessent) and Cadence (Modus/Encounter).
• Proficiency in Perl, Tcl, or Python scripting.
• Excellent analytical and problem-solving skills.

Nice to have

• Experience in RTL simulation, synthesis, Linting, CDC and RDC checks, and STA.
• Knowledge of quality metrics.

Culture & Benefits

• Permanent employment contract.
• Opportunity to work in a multi-disciplinary VLSI engineering environment.
• Professional growth within a global organization.