Dft Engineer

TL;DR

Dft Engineer: Performing initial test planning, inserting memory BIST and scan, improving coverage, and delivering test patterns to the product test group with an accent on industry leading mixed-signal SoC’s for consumer mobile audio markets. Focus on MBIST and ATPG pattern verification with gate level simulations.

Location: Austin, Texas

Company

hirify.global is propelled by the top engineers in mixed-signal processing, solving complex challenges with innovative end-user solutions for the world's top consumer brands.

What you will do

• Define, implement, and review DFT features in a collaborative team environment.
• Generate, insert, and verify Memory BIST logic.
• Perform scan insertion and ATPG pattern generation.
• Develop and review DFT timing and equivalence checking constraints.
• Identify and improve any test coverage gaps.
• Deliver MBIST and ATPG patterns to the product test group and support silicon bringup on the ATE.

Requirements

• MSEE with 2+ years of experience or BS with relevant industry experience.
• Possess strong hands on working knowledge on ASIC DFT design and verification.
• Experience in industry standard EDA tools for DFT such as FastScan, TestKompress, TetraMAX, Test Compiler etc.
• Candidates for this role must be able to access technical data without a requirement for an export license.
• We are unable to sponsor or obtain export licenses for this role.

Nice to have

• Experience with Verilog, System Verilog, or VHDL.
• Understanding of low power test techniques and architectures.
• Knowledge of scripting languages such as Perl, Python, or TCL.
• Experience with synthesis, static timing analysis, and developing timing constraints.
• Strong oral and written communication skills.

Culture & Benefits

• Award-winning culture built on a foundation of inclusion and fairness.
• Meaningful community engagement.
• Delivering enjoyable employee experiences.