Назад
Company hidden
20 часов назад

Physical Design Engineer

127 100 - 226 000$
Формат работы
onsite
Тип работы
fulltime
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/

TL;DR

Physical Design Engineer (ASIC/SoC): Working on design implementation activities related to place and route and timing closure with an accent on floor-planning, partitioning, placement, and physical verification. Focus on driving tools and methodologies to achieve desired PPA metrics, complete equivalence checks, STA, and timing closure.

Location: USA-CA San Jose Innovation Drive, USA-Allentown-1110 American Parkway NE, USA-Colorado-Fort Collins-4380 Ziegler Road, USA-CO Broomfield

Salary: $127,100 - $226,000

Company

hirify.global is a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.

What you will do

  • Work on design implementation activities related to place and route and/or timing closure, including floor-planning, partitioning, placement, and clock tree synthesis.
  • Drive tools and methodologies to achieve desired PPA metrics.
  • Complete equivalence checks, STA, timing closure, and power optimization.
  • Implement timing and functional ECOs.
  • Apply hirify.global's proven design methodology and milestone flow.

Requirements

  • Primary expertise in place and route and/or timing (constraints, STA).
  • Proficient in design implementation activities at both block and SoC level.
  • Experienced in floor-planning, partitioning, placement, clock tree synthesis, route, and physical verification.
  • Experience with formal verification, timing analysis, and Eco implementation.
  • Hands-on experience with timing analysis and place and route tools for ASIC/SoC Design.
  • BS in Electrical Engineering/ Computer Engineering or related field and 12+ years of related experience; or an MS in Electrical Engineering/ Computer Engineering or related field and 10+ years of related experience.

Nice to have

  • Experience with tools such as Primetime, ICC2, Innovus, Caliber, LEC, PrimeTime etc.
  • Full chip tapeout experience based on 7nm and lower technologies.

Culture & Benefits

  • Competitive and comprehensive benefits package includes medical, dental and vision plans.
  • 401(K) participation including company matching.
  • Employee Stock Purchase Program (ESPP) and Employee Assistance Program (EAP).
  • Company paid holidays, paid sick leave and vacation time.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →

Текст вакансии взят без изменений

Источник - загрузка...