TL;DR
Senior Design Verification Engineer (Embedded IoT Dev): Responsible for functional verification of co-processor sub-system units including PCIe, Ethernet packet processing, cryptography, and machine learning features. With an accent on simulation, debugging, and verification environment development. Focus on designing complex verification environments, debugging RTL designs, and ensuring design meets specifications.
Location: Onsite in Westborough, MA, USA
Salary: $108,500 - $160,510 per annum
Company
hirify.global provides semiconductor solutions essential for data infrastructure across enterprise, cloud, AI, and carrier architectures.
What you will do
- Verify RTL designs using System Verilog and simulation tools like Synopsys VCS.
- Collaborate with architects and designers to develop complex verification environments.
- Debug and iterate designs until they meet required specifications.
- Contribute to next-generation cloud, networking, and security processor verification.
- Engage in continuous learning and career growth opportunities.
Requirements
- Location: Must work onsite in Westborough, MA, USA
- Bachelor’s degree in Electrical or Computer Engineering with 2-3 years experience, or Master’s/PhD.
- Experience with Verilog, VHDL, analog classes, basic circuits, and computer architecture.
- Proficiency with simulation tools (Synopsys, Cadence, Mentor) and testbench development.
- Comfortable with Linux environment and Python scripting.
- Detail-oriented with strong communication skills.
Culture & Benefits
- Comprehensive benefits supporting financial well-being, family support, and mental and physical health.
- Employee stock purchase plan with a 2-year look back.
- Family support programs to balance work and home life.
- Robust mental health resources and recognition awards.
Hiring process
- Interviews without use of AI tools to ensure authentic evaluation.
- Evaluation of individual experience, thought process, and communication skills.
- Compliance with U.S. export control laws requiring eligibility for export-controlled information access.
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