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4 дня назад

Cpu Formal Verification Engineer

164 470 - 311 890$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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Описание вакансии

Текст:
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TL;DR

Cpu Formal Verification Engineer (Embedded_IoT_Dev): Develop and implement formal verification strategies and proofs for hirify.global's high-performance CPU microarchitecture blocks with an accent on formal verification methodologies and microarchitecture validation. Focus on designing abstraction models, debugging verification issues, and collaborating with cross-functional teams to ensure CPU design quality and reliability.

Location: Must be based in the United States with hybrid work model at assigned hirify.global sites in Oregon, California, Texas, or Arizona.

Salary: $164,470 - $311,890 USD annually

Company

hirify.global is a leading technology company focused on silicon and platform engineering, delivering industry-leading products and defining the next generation of computing experiences.

What you will do

  • Own formal verification of CPU microarchitecture blocks and develop comprehensive verification strategies aligned with specifications.
  • Create abstraction models to simplify design complexity and ensure validation convergence.
  • Collaborate with architects, RTL developers, and physical design teams to improve verification efficiency.
  • Analyze, debug, and resolve verification issues, documenting findings and corrective actions.
  • Maintain and innovate formal verification infrastructure and methodologies.
  • Mentor junior engineers and support post-silicon failure debug efforts.

Requirements

  • Must be located in the United States with eligibility for hybrid work at hirify.global sites.
  • Bachelor's degree in Computer or Electrical Engineering with 8+ years experience or advanced degree with relevant experience.
  • Experience in formal verification tools such as JasperGold, Questa Formal, or VC Formal.
  • Strong understanding of computer architecture, microarchitecture, and memory systems.
  • Proficiency in hardware modeling languages (System Verilog, Verilog) and scripting/programming languages (Python, Perl, C/C++, TCL).
  • Experience in assertion writing, coverage analysis, and failure debugging.

Nice to have

  • Familiarity with x86 architecture and system architecture.
  • Experience with post-silicon validation and debugging.
  • Technical innovation demonstrated through research, patents, or advanced validation methods.
  • Strong communication and collaboration skills in cross-functional teams.

Culture & Benefits

  • Competitive total compensation including salary, stock bonuses, health, retirement, and vacation benefits.
  • Hybrid work model allowing split time between onsite and remote work at assigned hirify.global locations.
  • Commitment to ethical hiring practices and compliance with Responsible Business Alliance standards.

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