RTL & Co-design Engineer (AI)

TL;DR

RTL & Co-design Engineer (AI): Designing and implementing key compute, memory, and interconnect components for custom AI accelerators with an accent on microarchitecture and RTL for major accelerator subsystems. Focus on architectural studies, hardware/software co-design, and ensuring functional correctness and performance targets for AI workloads.

Location: This role is based in San Francisco, CA and requires a hybrid work model of 3 days in the office per week. Relocation assistance is offered to new employees moving to the United States.

Compensation: $250,000–$460,000 + Offers Equity

Company

hirify.global is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity by pushing boundaries and safely deploying AI systems.

What you will do

• Produce clean, production-quality microarchitecture and RTL for major accelerator subsystems.
• Contribute to architectural studies, including performance modeling and feasibility analysis.
• Collaborate with software, simulator, and compiler teams for hardware/software co-design and workload fit.
• Partner with DV and PD teams to ensure functional correctness, timing closure, and area/power targets.
• Build and review performance and functional models to validate design intent.
• Participate in design reviews, documentation, and bring-up support across the full silicon lifecycle.

Requirements

• Graduate-level research or industry experience in computer architecture and AI/ML hardware–software co-design.
• Expertise writing production-quality RTL in Verilog/SystemVerilog, with a track record of delivering complex blocks to tape-out.
• Experience developing hardware design models or architectural simulators, ideally for AI/ML or high-performance compute systems.
• Familiarity with industry-standard design tools (lint, CDC/RDC, synthesis, STA) and methodologies.
• Ability to work cross-functionally with architecture, ML systems, compilers, and verification teams.
• Strong problem-solving skills and ability to think across abstraction layers, from algorithms to circuits.

Culture & Benefits

• Opportunity to work on industry-leading massive-scale hardware systems.
• Work in a hybrid model with 3 days in the office per week in San Francisco, CA.
• Relocation assistance available.
• Part of an equal opportunity employer committed to diversity and inclusion.
• Work with a company dedicated to safe AI deployment for humanity's benefit.