TL;DR

Clocking Design Engineer: Designing and implementing custom clock global networks and clock tree synthesis flows for %hirify_global%'s flagship CPU designs with an accent on clocking architecture definition, physical design, and advanced process technologies. Focus on solving complex high-frequency clock distribution challenges and collaborating with cross-functional teams.

Location: This role will require an on-site presence in US, Texas, Austin or US, Oregon, Hillsboro.

Salary: $141,910.00–$269,100.00 USD

Company

%hirify_global% is a corporation delivering breakthrough silicon and platform solutions, including flagship CPU designs, and offers a total compensation package that ranks among the best in the industry.

What you will do

Define clocking architecture for flagship CPU designs.
Design and implement custom clock global networks.
Develop clock tree synthesis flows.
Design custom clock circuits and clock library cells.
Interface and collaborate with architecture, physical design, full chip integration, and other teams.

Requirements

Bachelor’s degree in Electrical Engineering, Computer Engineering, or related STEM field with 4+ years of experience, or Master’s with 3+ years, or PhD with 2+ years.
Demonstrated experience in physical design, advanced process technologies, and circuit implementation.
Experience with static timing analysis, clock tree synthesis, and clock-related timing parameters.
Proficiency in industry-standard scripting and automation within EDA tool flows.

Nice to have

3+ years of experience in backend design and/or integration on leading edge process nodes.
Experience in high frequency clock distribution design and implementation.

Culture & Benefits

Competitive pay, stock bonuses, and comprehensive benefit programs including health, retirement, and vacation.
Total compensation package ranks among the best in the industry.