TL;DR
Physical Design Engineer (AI): Designing and optimizing custom silicon for advanced AI systems with an accent on PPA-optimized datapath and interconnect solutions. Focus on developing physical design strategies, tools, flows, and methodologies to enhance silicon performance and cost efficiency.
Location: San Francisco
Salary: $310,000 – $460,000 + Equity
Company
hirify.global is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity.
What you will do
- Develop, build and own tools, flows and methodologies for physical implementation.
- Own physical implementation of floorplan blocks from floorplanning to final signoff.
- Collaborate with RTL designers to drive optimal block implementation solutions.
- Analyze and optimize design for timing, power, and area trade-offs, working in collaboration with EDA vendors and ASIC partners.
Requirements
- BS with 4+ or MS with 2+ years or PhD with 0-1 year of relevant industry experience in physical design and methodology development.
- Demonstrated success in taping out complex silicon designs.
- Hands-on experience with block physical implementation and PPA convergence.
- Strong coding experience with python, bazel, TCL.
- Strong experience building physical design tools, flows and methodologies.
- Strong understanding of microarchitecture, RTL design, physical design, circuit design, physical verification and timing closure.
- Deep familiarity with industry-standard tools and flows for physical synthesis, PNR, LEC and power estimation.
Nice to have
- Experience with AI or HPC-focused chips.
- Experience with optimizing PPA for high performance compute cores.
- Hands-on experience with top-level design methodologies.
Culture & Benefits
- hirify.global is an equal opportunity employer committed to diversity.
- We are committed to providing reasonable accommodations to applicants with disabilities.
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