Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
Пожаловаться
Зарплата и рынок
развернуть
$109к-120к/год
$98к$130кмедиана$160к
По похожим ролям (49) ~ $130к/год
86
Хорошая вакансия
развернуть
Задачи описаны ясно, инженерный стек актуален, а работа над важными для безопасности системами дополняется обучением и гибким графиком; требование гражданства США и допуска заметно ограничивает круг тех, кому подойдет вакансия.
Требование допуска
Актуальные технологии
Понятные задачи
?Оборонные разработки
Условия и развитие
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Подключить Plus
Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
ASIC FPGA Engineer (VHDL/Verilog): Designing, simulating, verifying, and documenting FPGA-based secure system solutions for mission-critical products with an accent on RTL development, synthesis, timing, and resource utilization. Focus on building test benches, defining module interfaces, analyzing performance, and supporting secure embedded architectures.
Location: Remote in the United States; preferred work locations are Boise, Idaho, or Salt Lake City, Utah.
Salary: USD $109,037–$120,000 per year.
Company
hirify.global develops high-technology solutions, products, and services for defense and scientific missions.
What you will do
Design and deploy secure system solutions as part of a cross-functional team.
Create test and simulation plans, define module interfaces, and contribute to FPGA architecture and detailed design.
Support the FPGA development flow, including synthesis, place and route, timing, and power or resource utilization.
Verify test results, analyze performance, and document designs and engineering results.
Develop technical engineering products throughout the ASIC/FPGA development life cycle and communicate issues, impacts, and corrective actions.
Requirements
Bachelor’s degree in Computer Engineering, Computer Science, Electrical Engineering, or a related science, engineering, or mathematics field with at least 2 years of relevant experience, or a master’s degree with at least 6 months of relevant experience.
U.S. citizenship and the ability to obtain and maintain a Department of Defense Secret security clearance are required.
Proven FPGA RTL development experience with a strong body of work in VHDL or Verilog; fluency in VHDL or Verilog is required.
Fluency in embedded C or C++.
Experience developing test bench simulations and using Xilinx Vivado and/or Altera Quartus.
Strong understanding of computer architecture, analytical and problem-solving skills, and the ability to communicate complex technical concepts to technical and general audiences.
Working knowledge of ASIC/FPGA engineering processes, concepts, principles, and design tools.
Nice to have
Active U.S. security clearance.
Applied cryptography and cybersecurity experience in operational technology and embedded systems.
Hardware and software reverse engineering experience.
Knowledge of secure boot, RISC-V or other CPU microarchitectures, PCI Express, or DDR controllers.
Culture & Benefits
Research-oriented work developing practical solutions for national security missions.
Continuous learning and development opportunities.
Flexible schedules, including an optional 9/80 schedule with every other Friday off.
Benefits include 401(k) matching, flexible time off, paid parental leave, healthcare, health and wellness programs, and employee resource and social groups.
Будьте осторожны
Если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого. Это мошенники. Обязательно жмите «Пожаловаться» или пишите в поддержку. Подробнее в гайде →