aipythonverilogsystemverilogmixed signalsoc designdigital ic designlogic synthesis
Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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$102к-189к/год
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У роли чёткий и содержательный фокус на проектировании SoC в известной продуктовой компании; предусмотрена работа на разных этапах разработки чипа и широкий пакет льгот.
Актуальные технологии
Понятные задачи
Широкий пакет льгот
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Digital Design Engineer II (AI/SoC): Developing highly integrated, low-power System-on-Chip devices for the IoT wireless market with an accent on SystemVerilog RTL design, mixed-signal IP integration, and power optimization. Focus on architecting multi-domain SoCs, performing synthesis and timing analysis, and validating designs from pre-silicon verification through silicon bring-up.
Location: Austin, Texas, United States; hybrid
Annual base pay: $101,500–$188,500 USD
Company
hirify.global develops low-power wireless connectivity and highly integrated SoCs for smart home, industrial IoT, and smart cities applications.
What you will do
Develop complex low-power SoC architectures with multiple processors, digital and mixed-signal subsystems, power domains, and clock domains.
Design RTL modules in SystemVerilog and integrate digital and mixed-signal IP, including processors, memory, controllers, buses, security systems, machine learning, radio systems, analog IP, and pads.
Prepare and conduct architecture, design, and verification reviews throughout the project lifecycle.
Perform logic synthesis, full-chip timing analysis, and power analysis, working with backend teams to optimize power, performance, and area.
Conduct block- and chip-level pre-silicon verification and support silicon validation, bring-up, and cross-functional teams.
Requirements
Master’s degree in Electrical Engineering.
3–5 years of professional experience in digital CMOS IC design.
Verilog RTL design experience, including taking designs through the silicon development lifecycle to production.
Knowledge of embedded processor systems and C coding.
Experience with RTL and gate-level logic simulation, design and waveform browsers, and power analysis tools.
Experience with logic synthesis, timing constraints, and analog/mixed-signal design integration and verification in SoCs.
Experience with scripting and automation; knowledge of Python, Perl, and Tcl.
Experience with revision control and configuration management systems such as Perforce, Git, or Methodics.
Excellent written and verbal communication skills, a self-driven working style, and the ability to generate high output.
Experience with AI-powered tools and technologies for productivity, analysis, and decision-making.
Culture & Benefits
Full-time employment with a hybrid work arrangement.
Medical, dental, and vision plans, including PPO or Consumer Driven Health Plan options with HSA.
401(k) with match, Roth plan option, equity rewards, life and disability coverage, and flexible spending accounts.
Flexible PTO, three paid volunteer days per year, charitable contribution matching, and tuition reimbursement.
Adoption assistance, backup childcare, commuter and legal benefits, pet insurance, downtown parking, onsite gym, and wellness offerings.
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