Advanced ASIC FPGA Verification Engineer (FPGA)

Location: Fully remote, onsite, or hybrid/flex as mutually agreed; part of the Scottsdale, AZ team. U.S. citizenship is required, and candidates must be eligible to obtain a U.S. Department of Defense TS/SCI security clearance.

Salary: USD $122,785–$136,215 per year.

Company

hirify.global develops high-technology solutions, products, and services for defense and scientific missions.

What you will do

• Define, design, verify, and document ASIC and FPGA developments across the development life cycle.
• Determine architecture, system simulation, module interfaces, and detailed design approaches.
• Create test and simulation plans, establish functional criteria, verify results, and analyze performance.
• Develop verification strategies using simulation, functional coverage, assertions, constrained-random testing, and formal verification.
• Debug FPGA/ASIC hardware, support hardware/software integration, and contribute to major programs and projects.
• Improve ASIC/FPGA processes and provide technical direction to lower-level employees when needed.

Requirements

• Bachelor’s degree in Electrical or Computer Engineering or a related science, engineering, technology, or mathematics field plus 5+ years of job-related experience; alternatively, a master’s degree plus 3 years of job-related experience.
• U.S. citizenship and the ability to obtain a U.S. Department of Defense TS/SCI security clearance within a reasonable time after hire.
• In-depth experience with RTL simulation tools such as Questa or ModelSim in a Linux environment.
• In-depth knowledge of SystemVerilog object-oriented programming, UVM, UVM testbench architecture, agents, bus functional models, coverage, cover classes, and cover points.
• Experience with predictive testbench components, functional coverage, assertions, constrained-random testing, and the Register Abstraction Layer.
• Familiarity with requirements-based verification, requirement tracing, verification strategies, formal verification tools, code coverage, and waivers.
• Experience with shell scripting, TCL, and Python; proficiency in ASIC/FPGA engineering concepts, design principles, and processes.
• Ability to work under limited direction, determine solution approaches independently, communicate issues and corrective actions, multitask, think creatively, and collaborate across engineering teams.
• Proficient written and verbal communication skills, Microsoft Office proficiency, and ability to communicate with senior internal groups, project teams, and external customers.

Nice to have

• Questa Verification IP, UVM testbenches for Xilinx devices, Xilinx IP and SoCs, and Continuous Integration features of GitLab.
• Experience with AXI, PCIe, SpaceWire, Ethernet, DSP functions, signal-processing components, VHDL, digital circuit analysis, and embedded micro-processing systems.
• Experience designing high-speed interfaces and complex memory designs.
• Ability to identify opportunities to apply AI for continuous improvement and innovation.

Culture & Benefits

• Research-oriented work developing practical solutions for national security alongside award-winning teams.
• Flexible work options including fully remote, onsite, or hybrid/flex arrangements as mutually agreed.
• Flexible schedules, including an optional 9/80 schedule with every other Friday off.
• Benefits include 401(k) matching, flexible time off, paid parental leave, healthcare, health and wellness programs, and employee resource and social groups.
• Career development opportunities and ongoing learning for employees and colleagues.