Verification ASIC/FPGA Engineer (Remote)

Location: 100% remote within the US; U.S. citizenship required

Contract: 12 months with an option to extend or convert.

Company

hirify.global is recruiting for a leading federal defense contractor developing ASIC and FPGA systems.

What you will do

• Define architecture, module interfaces, system simulations, and detailed ASIC/FPGA design approaches.
• Create verification, test, and simulation plans establishing functional criteria.
• Develop and use UVM agents, bus functional models, predictive testbench components, coverage, assertions, and constrained-random tests.
• Verify results, analyze performance, debug FPGA/ASIC hardware, and assist with hardware/software integration.
• Support technical engineering products throughout the ASIC/FPGA development life cycle using applicable standards, processes, and tools.
• Contribute to major programs, organizational process improvements, vendor and simulation-tool reviews, and provide direction to lower-level employees when needed.

Requirements

• U.S. citizenship and the ability to obtain a DoD Secret clearance.
• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related science, engineering, or mathematics field plus at least 5 years of relevant experience, or a master’s degree plus at least 3 years of relevant experience.
• In-depth experience with RTL simulation tools such as Siemens Mentor Graphics Questa or ModelSim, or equivalent tools, in a Linux environment.
• In-depth knowledge of SystemVerilog, object-oriented programming, UVM, and UVM testbench architectures.
• Experience with UVM agents, bus functional models, cover classes, cover points, functional coverage, assertions, and constrained-random testing.
• Experience with the Register Abstraction Layer and requirements-based verification, requirements tracing, and verification strategies.
• Experience with Linux shell scripting, TCL, and Python.
• Familiarity with formal verification tools, code coverage, and writing waivers.
• Familiarity with debugging FPGA/ASIC hardware and supporting hardware/software integration.

Nice to have

• Experience with Questa Verification IP (QVIP).
• UVM testbench development for Xilinx devices using Xilinx IP and SoCs.
• Experience with AXI, PCIe, SpaceWire, and Ethernet interfaces.
• Experience with DSP functions and common signal-processing components.
• Experience with GitLab continuous-integration features.

Culture & Benefits

• Fully remote work arrangement.
• 12-month contract with an option to extend or convert.
• Work on major federal defense programs involving ASIC and FPGA development.