STA Application Engineer (EDA)

Location: San Jose or Austin, United States

Annual salary: $106,400–$197,600, plus potential incentive compensation.

Company

hirify.global develops technology solutions for the electronics and semiconductor industry.

What you will do

• Perform static timing, glitch, and noise analysis using the Tempus Signoff tool.
• Execute and deliver timing analysis, ECO, CAD tool, and methodology flows.
• Work with R&D and customers to enable timing analysis and ECO flows for advanced technologies.
• Perform timing correlation, tool feature benchmarking, constraint validation, and SPICE analysis across technology nodes and customer designs.
• Execute and lead Tempus timing signoff campaigns for existing and new customers.
• Deliver technical training and seminars within hirify.global and at customer sites.

Requirements

• Experience with SDC constraints, advanced OCV/SOCV concepts, derates, PBA timing, and distributed and concurrent STA flows.
• Basic knowledge of place and route, clock tree, RC extraction, and UPF/CPF concepts.
• Ability to automate flows using Perl, Tcl, and Python.

Culture & Benefits

• Full-time employment focused on impactful technology work and leadership development.
• Paid vacation and holidays.
• 401(k) plan with employer match.
• Employee stock purchase plan and medical, dental, and vision plan options.
• Potential bonus, equity, and other incentive compensation; compensation may vary by qualifications, skills, competencies, and work location.