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2 дня назад

Principal Application Engineer (Digital Implementation and Signoff)

127 400 - 236 600$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Principal Application Engineer (Digital Implementation and Signoff): Providing pre-sales and post-sales technical support for digital implementation and signoff tools, including workshops, benchmarks, demonstrations, methodology consultations, and product support with an accent on timing signoff, advanced-node STA, and ASIC implementation flows. Focus on debugging UPF and constraints, solving hierarchical and 3DIC timing closure challenges, and driving customer evaluations and Cadence solution implementations.

Location: San Jose, United States of America; travel required up to 20%.

Annual salary: $127,400–$236,600 in California, plus possible incentive compensation, bonus, equity, and benefits.

Company

hirify.global develops digital implementation and signoff tools and flows for semiconductor design.

What you will do

  • Provide pre-sales and post-sales technical support for Digital Implementation and Signoff tools.
  • Support sales campaigns through workshops, benchmarks, product demonstrations, methodology consultations, and product support.
  • Present technical capabilities and flows covering synthesis, place and route, and timing, physical, and power signoff.
  • Identify product opportunities, define technical campaigns with account teams, and support customer evaluations and benchmarks.
  • Drive hirify.global solution implementations, ongoing customer usage proliferation, and on/offsite support.
  • Collaborate with R&D on tool and methodology improvements and contribute technical content to hirify.global Online Support.

Requirements

  • BS in Electrical Engineering with 8–10 years of experience, or MS in Electrical Engineering with 6–8 years of experience.
  • Core timing signoff expertise, advanced-node static timing analysis, UPF and constraints debugging, and hierarchical and 3DIC design STA and closure solutions.
  • Knowledge of digital design fundamentals, semiconductor fundamentals, and static timing analysis.
  • Experience with ASIC digital implementation flows and tools.
  • Working knowledge of a scripting language: TCL, Perl, or Python.
  • Strong customer-facing communication, problem-solving, verbal, and written communication skills.
  • Strong drive for continuous learning and expanding professional skill sets.

Culture & Benefits

  • Full-time position with paid vacation and paid holidays.
  • 401(k) plan with employer match and employee stock purchase plan.
  • Medical, dental, and vision plan options.
  • Sales positions generally offer competitive On Target Earnings incentive compensation structures.

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