Назад
Company hidden
6 дней назад

ASIC Design Verification Engineer - Slingshot

109 000 - 251 000$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
c1
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/
TL;DR
ASIC Design Verification Engineer - Slingshot (SystemVerilog/UVM): Developing and verifying switch and NIC ASICs for HPE Slingshot interconnects used in HPC and AI systems with an accent on pre-silicon verification, testbench development, coverage closure, and sign-off. Focus on building scoreboards and checkers, triaging regression failures, applying automation and agentic AI tools, and solving complex verification problems across distributed engineering teams.

Location: Hybrid, with an average requirement of two days per week from an HPE office in Ft. Collins, Colorado; Bloomington, Minnesota; or Chippewa Falls, Wisconsin, United States

Salary: USD 115,000–218,000 annually in Colorado; USD 109,000–251,000 annually in Minnesota and Wisconsin. The ranges reflect base salary; variable incentives may also be offered.

Company

hirify.global is a global edge-to-cloud company developing infrastructure and solutions that connect, protect, analyze, and act on data and applications.

What you will do

  • Own pre-silicon verification of Slingshot switch and NIC ASIC blocks from test planning through sign-off.
  • Follow and improve design verification methodology and develop SystemVerilog and UVM testbench components, including bus functional models.
  • Build block-level scoreboards and checkers, analyze functional coverage, identify verification gaps, and drive coverage closure.
  • Triage regression failures, identify logic bugs, and drive bug closure.
  • Apply scripting, automation, and AI-assisted or agentic tools to improve verification speed and quality.
  • Collaborate with architects, designers, project leads, VLSI engineers, and internal and outsourced development partners; mentor less experienced staff.

Requirements

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.
  • At least 5 years of experience in VLSI design, verification, or implementation.
  • Strong knowledge of SystemVerilog and OVM or UVM methodologies.
  • Strong knowledge of programming and scripting languages, hardware description languages, and EDA tools.
  • Strong analytical and problem-solving skills.
  • Ability to work independently in a distributed team environment.
  • Strong written and verbal communication skills; mastery in English.

Nice to have

  • Experience verifying high-speed networking, switching, or NIC ASICs.
  • Experience with agentic AI coding tools and workflows applied to verification.
  • Experience with Python, Perl, Tcl, or another scripting language in Linux development environments.
  • Experience working as part of a geographically distributed team.

Culture & Benefits

  • Hybrid work with flexibility to manage work and personal needs.
  • Health, financial, and emotional wellbeing benefits for employees and their loved ones.
  • Personal and professional development programs supporting career growth and knowledge expertise.
  • Inclusive workplace committed to valuing varied backgrounds and individual uniqueness.

Будьте осторожны

Если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого. Это мошенники. Обязательно жмите «Пожаловаться» или пишите в поддержку. Подробнее в гайде →