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4 дня назад

Signal Integrity Engineer III (Networking)

109 500 - 220 500$
Формат работы
onsite
Тип работы
fulltime
Грейд
middle
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Signal Integrity Engineer III (Networking): Developing and validating signal and power integrity solutions for high-speed networking platforms with an accent on SI/PI analysis, interconnect and PDN modelling, and lab correlation. Focus on solving transmission-line, crosstalk, jitter, and high-speed SerDes challenges while supporting PCB design rules, validation, and production-ready system reliability.

Location: Onsite in Roseville, California, United States; the description also references Sunnyvale, California.

Base salary: USD 109,500–220,500 annually in California; variable incentives may also be offered.

Company

hirify.global develops edge-to-cloud and standards-based networking solutions for organizations ranging from small businesses to global enterprises.

What you will do

  • Support signal and power integrity solutions for high-speed interfaces, power distribution networks, precision timing, and general-purpose I/O.
  • Develop SI/PI solutions through analysis, simulation, design of experiments, and laboratory correlation.
  • Perform interconnect and PDN modelling, SI/PI simulations, and performance and reliability analysis.
  • Contribute to PCB stack-ups, design rules, constraints, and design reviews.
  • Conduct laboratory measurements using advanced instrumentation and correlate results with simulations.
  • Identify and resolve SI/PI risks while collaborating with hardware, layout, system, and validation engineers.

Requirements

  • Bachelor’s or Master’s degree in Electrical or Electronics Engineering.
  • At least 3 years of hands-on experience in product-level package or board design, SI analysis or methodology development, and laboratory correlation of simulation results.
  • Understanding of electromagnetics and signal integrity fundamentals, including transmission lines, reflections, crosstalk, insertion and return loss, ground bounce, termination, I/O buffer modelling, and high-speed differential signalling.
  • Working knowledge of digital and analog circuit design, frequency-domain analysis, jitter sources, and jitter reduction techniques.
  • Experience with high-speed interfaces such as Ethernet SerDes, PCIe, USB, or other SerDes-based systems.
  • Experience with SI/PI simulation tools such as Synopsys HSPICE, Keysight ADS, or Ansys HFSS.
  • Hands-on experience with VNAs, TDRs, real-time oscilloscopes, or spectrum analyzers.
  • Ability to analyze observed symptoms, identify root causes, and support resolution with guidance from senior engineers.

Nice to have

  • Exposure to 2-D/3-D field solvers, statistical or BER analysis, and Cadence CAD tools.
  • Strong interpersonal, written, and verbal communication skills, including the ability to interpret engineering drawings and technical documents and explain SI trade-offs.
  • Ability to build productive relationships across hardware, layout, system, and validation teams while managing assigned work independently.
  • Curiosity, self-motivation, receptiveness to coaching, continuous learning, and willingness to take ownership of diverse technical challenges.

Culture & Benefits

  • Hands-on ownership of SI/PI for high-performance networking platforms deployed globally at scale.
  • Opportunities to contribute to architecture, design rules, and engineering standards in a collaborative R&D environment.
  • Technical development, coaching, and knowledge-sharing opportunities.
  • Health, wellbeing, financial, and emotional support benefits are offered to US employees.
  • Career development programs and an inclusive workplace supporting qualified applicants with disabilities and other protected backgrounds.

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