Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Роль описана четко и дает возможность работать с комплексными FPGA-прототипами и проверкой ASIC в устойчивой компании, но ограничения экспортного контроля могут сократить круг тех, кому доступна эта позиция.
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
FPGA Implementation Engineer (JR) (FPGA/ASIC): Synthesizing complex ASIC designs onto FPGA platforms and delivering validated prototypes for software development and pre-silicon hardware-software validation with an accent on FPGA implementation, model conversion, and design quality. Focus on building functional and smoke tests, performing static timing analysis, modeling analog front ends, and improving FPGA prototyping methods.
Location: Austin, Texas, United States; hybrid
Company
hirify.global develops mixed-signal processing solutions for consumer brands, with a focus on audio and hardware-software engineering.
What you will do
Deliver FPGA platforms for software development and hardware-software pre-silicon validation.
Port ASIC-specific code and models into FPGA-compatible models.
Perform FPGA synthesis, implementation, and static timing analysis for complex ASIC designs.
Define functional tests, develop smoke tests, and validate FPGA builds and digital chip RTL from a user perspective.
Design equivalent analog models for the ASIC analog front end and introduce model-based design using Simulink or Matlab.
Improve FPGA prototyping methodology across the division.
Requirements
Master’s degree in Electrical Engineering, Computer Science, or a similar field and 3+ years of directly related experience.
Experience using FPGAs and understanding of differences between FPGA and ASIC design.
Proficiency with simulation, modeling equipment, and design tools.
Knowledge of Verilog, SystemVerilog, and digital design concepts.
Knowledge of verification and validation techniques and methodologies, with strong debugging skills.
Familiarity with AMBA protocols including AXI, AHB, and APB, plus SPI, I2C, I2S, and UART.
Hardware-development scripting experience with Python or Tcl.
Candidates must be able to access technical data without requiring an export license; candidates from certain embargoed countries may be restricted under applicable export-control laws.
Nice to have
Experience with FPGA synthesis, place and route, and timing closure, especially Synopsys Synplify and Xilinx Vivado.
Understanding of FPGA primitives including memories, I/O pads, BUFG, and MMCMs.
Object-oriented programming experience in Python.
Experience with floorplanning and advanced timing-closure techniques.
Familiarity with oscilloscopes, signal generators, and logic analyzers.
Strong documentation, communication, and interpersonal skills, plus the ability to work to tight and variable timelines.
Culture & Benefits
Full-time employment in the Hardware & Software / Hardware department.
Work in a mixed-signal audio development environment with an emphasis on inclusion, fairness, community engagement, and employee experience.
hirify.global cannot sponsor or obtain export licenses for this position.
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