Founding Analog / Mixed-Signal IC Engineer (Semiconductor)
Контакты
150 000 - 220 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
startupanalog designcadence virtuosomixed signal designcmospower managementintegrated circuitsspectresilicon characterizationsemiconductor packaging
Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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$150к-220к/год
$170к$190кмедиана$220к
По похожим ролям (50) ~ $190к/год
На СНГ рынке: $2.5к/мес ($1.9к - $3.1к)
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Роль дает понятную ответственность за весь цикл разработки и работу с передовыми полупроводниковыми системами, но ранняя стадия компании связана с большей неопределенностью, чем работа в зрелой продуктовой команде.
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Полный цикл
Передовые технологии
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Текст:
Hirify AI/Оригинал
TL;DR
Founding Analog / Mixed-Signal IC Engineer (Semiconductor): Designing analog and mixed-signal control and power-management silicon for highly integrated 3D hardware platforms with an accent on end-to-end IC ownership, advanced packaging interfaces, and silicon validation. Focus on architecting bias, sequencing, protection, telemetry, and sensing circuits, taking designs through tape-out, and correlating lab measurements with simulation.
Location: Suffolk County, Massachusetts, United States
Salary: $150,000–$220,000 per year
Company
hirify.global is partnering with an early-stage semiconductor company developing highly integrated 3D hardware platforms that combine advanced silicon, compound-semiconductor technologies, power delivery, and novel packaging for aerospace, communications, high-performance computing, power electronics, and next-generation connectivity.
What you will do
Architect and design analog and mixed-signal circuitry for control, monitoring, and power-management functions.
Own IC designs from specifications through schematic design, simulation, layout sign-off, tape-out, and silicon characterization.
Develop bias generation, sequencing, protection, telemetry, sensing, and power-control circuits.
Define electrical interfaces between silicon, compound-semiconductor devices, and advanced packaging.
Characterize returned silicon in the lab and correlate measured performance with simulation.
Help establish analog design flows, reusable IP, interface standards, and future design methodology.
Requirements
M.S. with approximately 5+ years of relevant industry experience, Ph.D. with approximately 2+ years, or equivalent hands-on IC design experience.
Multiple successful analog or mixed-signal IC tape-outs in CMOS, BiCMOS, SOI, or a comparable process.
Ownership of blocks from architecture and schematic design through physical verification and silicon bring-up.
Strong experience with Cadence Virtuoso, Spectre, Monte Carlo analysis, PVT/corner simulation, DRC/LVS, and parasitic extraction.
Hands-on experience in at least two areas: power-management IC design; high-voltage or compound-semiconductor bias/control; phased-array or beamforming control; protection, sequencing, sensing, fault detection, or telemetry; or mixed-signal circuitry for chiplet, multi-die, interposer-based, or 3D-integrated systems.
Familiarity with high-speed chip and system interfaces such as PCIe, UALink, DDR/LPDDR, UCIe, or related standards.
Ability to work directly in the lab and debug real hardware.
Culture & Benefits
Hands-on, end-to-end role with significant architectural ownership.
Close collaboration across circuits, devices, packaging, RF, thermal, power, and systems engineering.
Opportunity to influence design methodology, reusable IP, interface standards, and the future analog organization.
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