Назад
Company hidden
8 дней назад

Lead ASIC Verification Engineer (Secret Clearance)

Формат работы
onsite
Тип работы
project
Грейд
senior/lead
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/
TL;DR
Lead ASIC Verification Engineer (SystemVerilog/UVM): Leading block-, subsystem-, and full-chip ASIC and FPGA verification from strategy and planning through sign-off with an accent on reusable test environments, coverage, regression, formal verification, and emulation. Focus on root-cause analysis, verification automation, requirements traceability, technical mentoring, and protecting sensitive information when using approved AI-enabled tools.

Location: Onsite at one of the US hubs: Boise, Idaho; Salt Lake City, Utah; Scottsdale, Arizona; or San Jose, California.

Company

hirify.global is recruiting for a federal defense contractor developing ASIC and FPGA systems.

What you will do

  • Lead ASIC verification at block, subsystem, and full-chip levels, including verification strategy, plans, schedules, coverage goals, and completion criteria.
  • Build reusable SystemVerilog/UVM test environments and verification components, and execute simulation, regression, formal verification, and emulation.
  • Verify third-party and custom IP for functional and integration compliance while maintaining traceability from requirements through test results and defect closure.
  • Investigate failures, perform root-cause analysis, define corrective-action verification, and mitigate verification risks.
  • Present verification status and recommendations, prepare plans and reports, and mentor verification engineers.
  • Support process improvement, automation, metrics, reusable assets, vendor oversight, proposals, estimates, and program planning; use approved AI-enabled tools where they add engineering value while protecting sensitive information.

Requirements

  • US citizenship and an active DoD Secret clearance are required.
  • Bachelor’s degree in Electrical or Computer Engineering, or a related science, engineering, or mathematics field, plus at least 10 years of relevant experience; or a master’s degree plus at least 8 years of relevant experience.
  • Strong knowledge of ASIC and SoC verification processes, with proficiency in SystemVerilog, UVM, assertions, coverage, and regression testing.
  • Experience developing reusable testbench components and register models, and strong understanding of RTL, digital logic, interfaces, clocks, and resets.
  • Ability to convert requirements into measurable verification objectives and tests, debug simulations, and determine root causes.
  • Experience with Perl, Tcl, Bash, and Python or similar scripting languages.
  • Experience with ASIC simulation and debug tools such as VCS, Verdi, Questa, or equivalent tools.
  • Experience with Linux, version control, and automated regression environments.
  • Ability to communicate technical results clearly, lead multiple activities while maintaining quality and schedule, and provide technical judgment, mentoring, and problem-solving.

Culture & Benefits

  • Contract engagement for 6–12 months with an option to extend or convert.
  • High-visibility work supporting federal defense systems with opportunities for broader technical leadership.

Будьте осторожны

Если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого. Это мошенники. Обязательно жмите «Пожаловаться» или пишите в поддержку. Подробнее в гайде →