Senior Engineer, DSP Systems Engineering (Satellite Communications)

Location: Betzdorf, Luxembourg; able to travel nationally and internationally.

Company

SES develops satellite connectivity services, including the meoSphere medium Earth orbit constellation for government, enterprise, commercial, and broadband customers.

What you will do

• Design and model DSP algorithms for digital beamforming, channelization, MIMO, DPD, CFR, calibration, and digital compensation in phased-array and satellite communication systems.
• Develop DUC/DDC blocks using multi-rate DSP techniques and optimize fixed-point implementations for low-power FPGA and ASIC hardware.
• Create end-to-end RF and baseband models in MATLAB, Python, and C++, including beamforming, quantization effects, and channel impairments.
• Translate system requirements into ASIC-ready DSP blocks and define fixed-point accuracy, throughput, and latency targets with RTL and physical design teams.
• Develop hardware/software co-design models, partitioning algorithms across firmware, digital logic, and the analog front end.
• Prototype and validate DSP performance through FPGA, simulation, pre-silicon, and post-silicon workflows, including beamforming calibration and silicon bring-up.

Requirements

• MS or PhD in Electrical Engineering, Signal Processing, or a related field, with at least 5 years of relevant DSP algorithm design experience.
• Proven experience with digital beamforming, MIMO signal processing, and calibration algorithms for phased arrays.
• Strong system-level modelling experience with MATLAB/Simulink and Python, including model-based design.
• Proficiency in DSP algorithm simulation using C/C++ or SystemC, especially fixed-point modelling for ASIC implementation.
• Deep understanding of OFDM, modulation schemes, adaptive filtering, channel estimation, and RF impairment modelling.
• Familiarity with ASIC integration flows, including RTL handoff, verification, and bit-accurate modelling.
• Experience with lab-based silicon bring-up, calibration, and verification of beamforming performance.
• Understanding of FPGA prototyping, hardware emulation, and DSP system validation flows.
• Eligibility for ESA, EU, NATO, or national SECRET personnel security clearances and readiness to undergo the required security clearance procedure.

Nice to have

• Strong knowledge of digital communications theory and antenna array processing.
• Ability to bridge system, algorithm, and implementation levels in custom beamforming ASICs.
• Excellent communication skills for coordination across DSP, RTL, RF, firmware, and system integration functions.
• Analytical approach to precision-versus-power, latency-versus-accuracy, and hardware-cost-versus-performance trade-offs.
• Experience with radiation and thermal constraints in satellite ASIC system design.
• Experience with MATLAB, Simulink, Python, NumPy, TensorFlow, C/C++, VivadoAMD, ADS, Keysight SystemVue, or custom DSP simulation frameworks.

Culture & Benefits

• Permanent position within an agile software, firmware, and hardware development team.
• Work focuses on satellite payloads and high-reliability communication ASICs whose algorithms are intended to fly in space.
• National and international travel is required.
• SES is an equal opportunity employer.