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3 дня назад

Senior Engineer, FPGA & ASIC System Architecture (RFSoC/ASIC)

Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
c1
Страна
Luxembourg
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Senior Engineer, FPGA & ASIC System Architecture (RFSoC/ASIC): Architecting advanced FPGA, RFSoC, and ASIC-based digital payload and radio unit solutions for MEO satellite communication systems with an accent on digital signal processing, high-speed interfaces, and RF integration. Focus on defining scalable system architectures, leading RTL design and verification strategies, and solving complex hardware bring-up, performance, and multi-program integration challenges.

Location: Betzdorf, Luxembourg; at least 60% onsite from the office. Travel is required as needed for project realization.

Company

hirify.global develops satellite connectivity services, including the meoSphere MEO satellite programme for secure connectivity, broadband access, and high-throughput communication systems.

What you will do

  • Define and own FPGA and ASIC system architectures for RF and digital communication subsystems across multiple programmes.
  • Translate system requirements into architecture specifications covering clock and reset strategies, interfaces, register maps, and scalable platform reuse.
  • Architect DSP chains for beamforming, DFE, up/down conversion, and crest factor reduction, integrating ADC/DAC, IF generation, and RF signal paths.
  • Lead high-speed interface architecture for Ethernet, eCPRI, RF over Ethernet, and fronthaul solutions aligned with 3GPP 5G NR/FR2 and Radio Unit architectures.
  • Lead and mentor RTL design teams, coordinate FPGA and ASIC development activities, and manage requirements traceability.
  • Drive verification, hardware bring-up, integration, debugging, resource estimation, performance analysis, roadmaps, and risk mitigation across multiple programmes.

Requirements

  • Master’s degree or PhD in Electrical Engineering, Telecommunications, Computer Engineering, or a related field.
  • Typically 10+ years of experience in FPGA and/or ASIC-based system design, including architecture roles.
  • Fluency in English required.
  • Hands-on experience with AMD/Xilinx RFSoC or similar FPGA platforms and complex DSP-based high-performance digital architectures.
  • Strong expertise in RF digital signal processing, including beamforming, DFE, conversion chains, ADC/DAC interfacing, and IF signal processing.
  • Experience with multi-clock-domain and high-speed digital design, including Ethernet, JESD, and eCPRI.
  • Knowledge of RF system integration, Radio Unit design, 3GPP 5G NR/FR2 standards, RF over Ethernet, and fronthaul architectures.
  • Hands-on experience translating high-level requirements into structured architectures, as well as hardware bring-up, integration, and debugging.
  • Strong analytical, problem-solving, communication, documentation, leadership, and prioritization skills; ability to work autonomously across multiple high-impact priorities in a multidisciplinary and international environment.
  • Must be eligible for SECRET security clearance and applicable EU/ESA/NATO equivalents.

Nice to have

  • Knowledge of languages other than English.

Culture & Benefits

  • Permanent employment with at least 60% office-based work.
  • Work in a multidisciplinary and international environment on satellite connectivity and high-throughput communication systems.
  • Travel support for project realization activities.
  • Inclusive workplace committed to equal employment opportunities and diversity.

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