Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Это хорошо описанная стажировка с практической работой над современными IP для высокоскоростной памяти, но срочный формат для студентов не гарантирует долгосрочного продолжения.
IP Design Intern (FPGA): Developing and verifying configurable external memory IP cores for DDR5 and LPDDR5 interfaces with an accent on FPGA RTL design, CAD tool integration, and hardware verification. Focus on designing protocol-based architectures, building simulation models and regression frameworks, and debugging high-speed interface hardware.
Location: Toronto, Ontario, Canada; Shift 1 (Canada). Applicants must be eligible for any required Canada export authorizations.
Salary: 90,000–100,000 CAD annually, plus performance-based incentive opportunities.
Company
hirify.global is an independent FPGA solutions provider developing programmable technologies for AI, cloud, networking, and edge markets.
What you will do
Develop and verify configurable external memory IP cores for DDR5 and LPDDR5 devices.
Define architectures and develop RTL based on DDR and LPDDR protocol specifications.
Support FPGA device integration and CAD tool integration.
Build verification IP, methodologies, frameworks, bus functional models, and regression tests.
Develop design examples, simulation models, and technical documentation.
Support hardware power-on, debug, product rollout, and customer technical issues while collaborating with silicon, validation, application engineering, and customer experience teams.
Requirements
Currently pursuing a BS degree in Computer Engineering, Engineering Science, Electrical Engineering, Computer Science, or a related field.
At least 3 months of experience designing or verifying digital logic hardware using SystemVerilog, Verilog, and/or VHDL.
At least 3 months of experience with scripting languages and/or software programming, including Python, TCL, Perl, and/or C/C++.
Strong communication, initiative, innovation, teamwork, problem-solving, and attention to detail.
Motivation to learn and adapt to fast-changing technologies and environments.
Accountability, integrity, a winning mindset, collaboration, influencing skills, and willingness to work across geographical locations.
Nice to have
FPGA design experience.
Experience with RTL simulation, timing closure, and static timing analysis.
Experience with DDR and/or LPDDR hardware interfaces.
Culture & Benefits
Full-time student/intern position for a fixed term.
Performance-based incentive opportunities reward individual contributions and company success.
Canadian work experience is not required.
hirify.global uses artificial intelligence to screen, assess, or select applicants.
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