Package Design Engineer (Semiconductor Packaging)

Location: Nijmegen, Netherlands; other location: Eindhoven

Company

hirify.global develops advanced semiconductor products and packaging technologies across its product lines, including networking, radar, automotive processing, V2X, wireless high-frequency connectivity, and infotainment solutions.

What you will do

• Develop advanced semiconductor package solutions from concept through release, optimizing cost, manufacturability, performance, and reliability.
• Perform package architecture development, die-package-PCB codesign, floorplanning, bump-map definition, stackup planning, and routing implementation.
• Design and optimize RF and mmWave package structures, including controlled-impedance routing, grounding, shielding, and signal-launch structures.
• Collaborate with simulation engineers to evaluate electrical performance, signal integrity, power integrity, and electromagnetic behavior.
• Support design reviews, manufacturability assessments, design-rule compliance, and technical release documentation.
• Work with business-line partners, SoC designers, project managers, assembly sites, OSATs, substrate suppliers, and cross-functional engineering teams.

Requirements

• Bachelor’s or Master’s degree in Electrical, Mechanical, or Materials Engineering, or equivalent.
• Five or more years of direct experience designing flip-chip and wire-bond substrate-based semiconductor packages, as well as WLCSP/FOWLP packages.
• Expert proficiency with Cadence Allegro Package Designer (APD) and AutoCAD.
• Strong understanding of substrate technologies, substrate design rules, and Geometric Dimensioning and Tolerancing.
• Effective written, verbal, and presentation communication skills.
• Strong technical leadership, problem-solving, ownership, accountability, collaboration, and teamwork skills.
• Ability to drive technical execution with minimal supervision in a global engineering environment.

Nice to have

• Experience with die-package-PCB codesign methodologies.
• Knowledge of power integrity and signal integrity, high-speed signal routing, differential-pair implementation, return-path management, and impedance-controlled interconnect design.
• Experience with or extensive exposure to primarily analog SoC design.

Culture & Benefits

• Work in a global engineering environment.
• Collaborate with semiconductor business lines, SoC designers, simulation specialists, assembly sites, OSATs, and substrate suppliers.
• Contribute to next-generation packaging technologies and advanced automotive, radar, networking, and wireless solutions.