Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Зарплата и рынок
90к-100к CAD/год
61к CAD61к CADмедиана63к CAD
По похожим ролям (6) ~ 61к CAD/год
На СНГ рынке: $1.3к/мес ($1.2к - $1.3к)
86
Крутая вакансия
развернуть
Чётко описанная стажировка в FPGA-компании даёт практический опыт RTL-разработки и верификации высокоскоростных интерфейсов, что особенно ценно для карьеры в аппаратной инженерии.
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Актуальные технологииСильная специализацияПонятные задачи
Оценка от Hirify AI
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Undergrad Intern Technical (FPGA): Developing and verifying configurable FPGA IP cores for video, display, chip-to-chip, and high-speed data transmission interfaces with an accent on RTL design, verification, and CAD tool integration. Focus on implementing advanced FPGA architectures, debugging hardware during power-on, and supporting product releases and customer integration.
Salary: $90,000–$100,000 CAD per year, with performance-based incentive opportunities
Company
hirify.global is an independent FPGA solutions provider developing programmable technologies for AI, cloud, networking, and edge markets.
What you will do
Design FPGA architectures and RTL based on protocol specifications for video processing, display, chip-to-chip, and high-speed data transmission interfaces.
Develop and verify PHY-lite, MIPI, and LVDS-based IP cores, including verification IP, methodologies, frameworks, bus functional models, and regression tests.
Provide device support and integrate IP with the Quartus Prime CAD tool.
Develop design examples, simulation models, and technical documentation.
Perform hardware power-on and debug, and support new product releases and rollouts.
Collaborate with silicon design and validation, post-silicon validation, application engineering, and customer experience teams, including customer technical support.
Requirements
Currently pursuing a BS degree in Computer Engineering, Engineering Science, Electrical Engineering, Computer Science, or a related field.
At least 3 months of experience in digital logic hardware design or verification using SystemVerilog, Verilog, and/or VHDL.
At least 3 months of experience in scripting languages and/or software programming using Python, TCL, Perl, and/or C/C++.
Strong communication, initiative, innovation, teamwork, problem-solving, and attention to detail.
Motivation to learn and adapt to fast-changing technologies and environments.
Accountability, integrity, a winning mindset, collaborative behavior, influencing skills, and willingness to work across geographical locations.
Applicants must be eligible for any required Canada export authorizations.
Nice to have
FPGA design experience.
Experience with RTL simulation, timing closure, and static timing analysis.
Experience with video IPs such as MIPI, high-speed SerDes IOs, and/or physical-layer design for chip-to-chip interconnect systems.
Culture & Benefits
Full-time student/intern position with a fixed-term arrangement.
Compensation aligned with the Canadian labour market and performance-based incentive opportunities.
Canadian work experience is not required.
Artificial intelligence is used to screen, assess, or select applicants.
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