Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Зарплата и рынок
$150к-241к/год
$150к$170кмедиана$190к
По похожим ролям (50) ~ $170к/год
На СНГ рынке: $1.4к/мес ($1.2к - $1.6к)
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Крутая вакансия
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Чётко описанная роль в Company hidden объединяет RTL-дизайн, оптимизацию AI-нагрузок и совместную разработку аппаратного и программного обеспечения для новых NPU, давая опыт работы над передовыми AI-чипами.
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Актуальные технологииРазвитие AI-чиповПонятные задачиМасштаб Company hidden
Оценка от Hirify AI
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Deep Learning Hardware Engineer (AI): Designing and optimizing neural compute and AI accelerator architectures for next-generation Intel NPUs, AI PCs, edge AI, and multimodal foundation models with an accent on RTL design, hardware-software co-design, and inference efficiency. Focus on evaluating AI workloads, optimizing models through quantization, pruning, compression, and sparsity, and improving performance, power, memory hierarchy, and data movement.
Location: Hybrid work model with on-site and off-site work; assigned hirify.global sites in Santa Clara, California, or Hillsboro, Oregon, United States.
Annual salary: $149,750–$240,710 USD.
Company
hirify.global develops computing, AI, neural processing, and semiconductor technologies for personal computers and hirify.globalligent computing platforms.
What you will do
Design and optimize neural compute and AI accelerator architectures for next-generation hirify.global NPU technologies.
Develop and evaluate RTL implementations of hardware features supporting machine learning workloads.
Analyze AI models and workloads to identify performance, power, and efficiency opportunities.
Collaborate with architecture, software, compiler, algorithm, and machine learning teams on hardware-software co-design.
Evaluate neural network mapping strategies for accelerated inference execution.
Apply quantization, compression, pruning, sparsity, pipelining, parallelism, memory hierarchy, and data movement optimization techniques.
Requirements
Bachelor's degree in Computer Science, Electrical Engineering, or a STEM-related field with 3+ years of relevant experience; or a Master's degree in the same fields with 2+ years of experience; or a PhD degree in the same fields with 3+ months of educational or work experience.
Experience in digital logic design and RTL design using SystemVerilog or Verilog.
Experience with AI model architectures, layers, activation functions, and neural network topologies, including models such as Llama, Qwen, DeepSeek, or Pi0.5.
Experience working with Git workflows and repositories.
Experience optimizing AI models for performance through quantization, pruning, and compression.
Curiosity, learning agility, analytical problem solving, collaboration, ownership, initiative, adaptability, and clear communication with technical and non-technical audiences.
Nice to have
Familiarity with AI frameworks, neural computing operations, and hardware-accelerated inference techniques.
Hands-on experience with modern deep learning topologies, including foundational models.
In-depth knowledge of multi-core and multi-threading concepts, memory hierarchy, and floating-point versus fixed-point computations.
Experience collaborating across disciplines to align hardware and software requirements.
Culture & Benefits
Hybrid work model combining on-site work at an assigned hirify.global site with off-site work.
Health, retirement, and vacation benefits.
Competitive pay, stock bonuses, and a total compensation package.
Opportunities to work with AI and machine learning technologies and learn from hardware and AI experts.
Collaboration across hardware, software, and research teams on next-generation AI silicon architecture.
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