pythongitperlsystemveriloguvmtclspiceiso 26262assertion based verificationanalog mixed signal verification
Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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$81к$96кмедиана$189к
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Это хорошо очерченная senior-позиция по AMS-верификации в крупной полупроводниковой компании с сильным техническим фокусом; при этом работа только на месте и нехватка деталей о льготах оставляют практические вопросы.
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Текст:
Hirify AI/Оригинал
TL;DR
AMS Verif (Analog/Mixed-Signal): Verifying complex analog and mixed-signal integrated circuits with an accent on SystemVerilog/UVM environments, mixed-signal simulation, and automated regression testing. Focus on analyzing design issues, improving verification coverage, and producing sign-off documentation for reliable IC products.
Location: Sophia-Antipolis (Valbonne), France; other location: Caen, France
Company
hirify.global develops semiconductor products and complex integrated circuits.
What you will do
Develop and execute verification plans for complex Analog/Mixed-Signal blocks and systems, including critical features and potential failure modes.
Create verification environments, testbenches, test cases, and assertion-based verification using SystemVerilog, UVM, and industry-standard methodologies.
Run AMS, SPICE, and Fast SPICE simulations and analyze results to identify and debug design issues.
Collaborate with design engineers on architectural specifications and design-for-verifiability feedback, and participate in design reviews.
Automate regression testing and maintain verification coverage, bug tracking, reports, and sign-off documentation.
Stay current with AMS verification tools and techniques.
Requirements
Master’s degree or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
8+ years of experience in AMS verification for complex ICs.
Strong understanding of analog circuit design fundamentals, including op-amps, ADCs, DACs, and PLLs.
Proficiency in SystemVerilog and UVM for mixed-signal verification.
Hands-on experience with mixed-signal simulation tools such as Cadence Virtuoso, Spectre, Xcelium, and QuestaSim.
Experience with Python, Perl, or Tcl for test automation and data analysis.
Familiarity with assertion-based verification techniques.
Excellent problem-solving skills and attention to detail.
Strong communication and interpersonal skills, with the ability to work effectively in a collaborative team environment.
Nice to have
Experience with version control systems such as Git.
Knowledge of functional safety industry standards and methodologies, such as ISO 26262.
Culture & Benefits
Full-time position within a collaborative engineering team.
Close collaboration with design engineers and participation in design reviews.
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