pythongitperlsystemveriloguvmtclspiceiso 26262assertion based verificationanalog mixed signal
Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Чётко описанная senior-позиция верификации AMS в крупной полупроводниковой компании: стек и обязанности понятны, но работа только в офисе и требование от 8 лет опыта сужают круг подходящих вариантов.
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Высокий порог опытаАктуальный стекКрупный работодатель
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Текст:
Hirify AI/Оригинал
TL;DR
AMS Verification Engineer (Analog/Mixed-Signal): Developing and executing verification plans, environments, testbenches, and regression testing for complex analog/mixed-signal integrated circuits with an accent on SystemVerilog, UVM, mixed-signal simulation, and assertion-based verification. Focus on analyzing simulation results, debugging design issues, automating coverage, and supporting verification sign-off for reliable IC designs.
Location: Caen, France; other location: Sophia-Antipolis (Valbonne), France
Company
hirify.global develops semiconductor products and complex integrated circuits.
What you will do
Develop and execute verification plans for complex Analog/Mixed-Signal blocks and systems, including critical feature and failure-mode analysis.
Create and maintain verification environments using SystemVerilog, UVM, and industry-standard methodologies.
Develop testbenches, test cases, assertion-based verification, and automated regression testing.
Run AMS, SPICE, and Fast SPICE simulations; analyze results and debug design issues.
Collaborate with design engineers on architectural specifications and design for verifiability.
Prepare coverage metrics, bug tracking, sign-off documentation, and verification reports; participate in design reviews.
Requirements
Master’s degree or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
8+ years of experience in AMS verification for complex ICs.
Strong understanding of analog circuit fundamentals, including op-amps, ADCs, DACs, and PLLs.
Proficiency in SystemVerilog and UVM for mixed-signal verification.
Hands-on experience with mixed-signal simulation tools such as Cadence Virtuoso, Spectre, Xcelium, or QuestaSim.
Experience with Python, Perl, or Tcl for test automation and data analysis.
Familiarity with assertion-based verification techniques.
Excellent problem-solving, attention-to-detail, communication, and interpersonal skills, with the ability to work effectively in a collaborative team environment.
Nice to have
Experience with version control systems such as Git.
Knowledge of industry standards and methodologies for functional safety, such as ISO 26262.
Culture & Benefits
Full-time role within a collaborative engineering team.
Participation in design reviews and work with design engineers across verification activities.
Opportunity to stay current with AMS verification tools and methodologies.
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