Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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$221к/год
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Чётко очерченная senior-позиция в продуктовой полупроводниковой компании даёт серьёзную ответственность за ключевые технологии FPGA, но обязательный офисный формат и право на работу в США ограничивают доступность вакансии.
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Право на работу в СШАТолько офисВыше рынкаЧёткие задачиРазработка FPGA
Оценка от Hirify AI
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Senior Memory Designer (FPGA): Designing and developing custom high-speed, low-power SRAM and configuration RAM for FPGA products with an accent on advanced semiconductor technologies, variation-aware design, and memory PPA targets. Focus on architecting embedded memories, performing schematic simulation and margin verification, planning tight-pitch layouts, and managing the full design flow through characterization, timing, and model generation.
Location: San Jose, CA, United States. Onsite role with satisfactory proof of the right to work in the United States required.
Salary: Base pay of 220800 USD annually; the role may also include variable or incentive compensation and/or equity.
Company
hirify.global develops low-cost, low-power programmable logic solutions, including FPGA, CPLD, and programmable power management devices.
What you will do
Lead the design and development of custom high-speed, low-power SRAM and low-power configuration RAM for FPGA products.
Develop memory architectures and implement them in advanced semiconductor technologies, including FinFET and nanometer CMOS.
Perform schematic capture, simulation, and margin verification for major memory blocks.
Oversee layout planning and ensure tight pitch-matched memory layouts.
Collaborate with architecture and design teams to define memory performance, power, area, and yield targets.
Manage the full embedded memory design flow, including architecture, circuit design, physical implementation, compiler usage, characterization, timing, and model generation.
Requirements
Bachelor’s degree in electrical engineering or a related field. A Master’s degree or PhD is preferred.
More than 10 years of experience in memory design, verification, validation, and integration.
Strong knowledge of custom memory design, including high-speed and low-power memory and custom memory for FPGA configuration.
Expertise in high-performance and low-power design techniques.
Familiarity with variation-aware design in advanced semiconductor technologies.
Excellent problem-solving and communication skills, with the ability to work collaboratively in a team environment.
Satisfactory background and reference checks and proof of the right to work in the United States.
Nice to have
Experience with large-density memory cell design for high yield.
Knowledge of semiconductor device fundamentals.
Master’s degree or PhD in electrical engineering or a related field.
Culture & Benefits
Results-oriented, team-first, and collaborative work environment.
Focus on R&D, product innovation, and customer service.
Comprehensive benefits may include healthcare, retirement plans, and paid time off.
Potential eligibility for variable or incentive compensation and/or equity.
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