Senior Staff Hardware Design Engineer (Coherent DSP)

Location: Irvine, California, United States; onsite five days per week. Remote and hybrid arrangements are not available. Applicants may be subject to U.S. export-control eligibility and export-license review.

Base pay: $129,100–$191,030 per annum. Bonus, equity plans, new-hire equity grant, annual equity refreshers, and employee stock purchase plan are also available.

Company

hirify.global develops semiconductor solutions and coherent digital signal processor technologies for enterprise, cloud, AI, carrier, hyperscale infrastructure, telecommunications, and optical networking applications.

What you will do

• Own complex board-level designs from architecture and simulation through fabrication, bring-up, characterization, validation, and performance reporting.
• Develop reference boards and evaluation systems for 400G/800G-per-wavelength coherent DSP optical transmission, including power delivery, control, clocking, high-speed I/O, and form-factor requirements.
• Architect, simulate, and characterize high-speed interconnects and signal paths exceeding 110 GHz, correlating simulations with laboratory measurements.
• Design and simulate power circuits and power distribution networks for high-performance coherent DSPs.
• Collaborate with systems, analog, digital, firmware, design-for-test, failure analysis, validation, applications, PCB layout, fabrication, and assembly partners.
• Lead board bring-up, debugging, failure analysis, design reviews, corrective actions, and manufacturable PCB implementation.

Requirements

• Bachelor’s degree in Electrical or Electronic Engineering, or a related discipline, with at least five years of relevant experience in high-speed board-level hardware design.
• Ability to independently drive complex hardware designs through development, bring-up, and validation.
• Experience designing systems with power circuits, analog circuitry, clocking, FPGAs, microprocessors, microcontrollers, memory, Ethernet, SerDes, or related technologies.
• Proficiency in schematic capture and component library management with OrCAD CIS/CIP, Altium, or equivalent tools.
• Experience with high-frequency signal integrity simulation using Ansys HFSS, SIwave, Keysight ADS, or equivalent tools, plus characterization with vector network analyzers and time-domain reflectometry.
• Experience designing and simulating analog and power circuits with PSpice or equivalent tools.
• Experience working with PCB layout engineers and board manufacturers on component placement, layer stack-ups, routing constraints, fabrication requirements, and design rules.
• Hands-on experience with board bring-up, testing, characterization, and failure analysis using digital multimeters, oscilloscopes, logic analyzers, and related laboratory equipment.
• Ability to correlate simulations with measurements, explain discrepancies, and convert findings into design improvements; clear technical communication, thorough documentation, and collaboration with engineering teams and external suppliers.

Culture & Benefits

• Work on AI infrastructure and coherent optical connectivity for high-speed fiber-optic networks.
• Own the full hardware development cycle and combine electromagnetic simulation, schematic design, laboratory measurements, and system troubleshooting.
• Collaborate across silicon architecture, high-speed analog design, firmware, optical systems, and customer applications.
• Benefits support financial well-being, family support, mental and physical health, and recognition.
• Additional offerings include family support programs, mental health resources, recognition and service awards, and an employee stock purchase plan with a two-year lookback.

Hiring process

• Interviews evaluate individual experience, thought process, and communication skills in real time.
• Use of AI tools, transcription apps, real-time answer generators, or automated note-taking bots during interviews is not permitted and may result in disqualification.