Principal Hardware Engineer - 3rd Party IP Engineer (Semiconductor)

Location: Morrisville, NC, United States; limited travel to customer sites may be required.

Expected base pay range: USD 0–0 per annum, plus eligibility for bonus and equity plans.

Company

hirify.global develops semiconductor solutions and IP for enterprise, cloud and AI, carrier, storage, security, and networking architectures.

What you will do

• Integrate third-party DDR, LPDDR, GDDR, HBM, and eMMC interface cores into hirify.global SoC and custom silicon designs.
• Define core requirements, validate IP developer competence, oversee core development, and ensure technology and test compliance.
• Support sales bids by coordinating with leading-edge IP providers to meet customer requirements.
• Manage third-party developers, define design rules, develop statements of work, and lead provider progress reviews.
• Advise design centers on core integration and conduct joint reviews with design centers and IP providers.
• Drive problem resolution through provider reporting tools, support 8D follow-through for significant supplier issues, and assist with post-silicon validation.

Requirements

• Bachelor’s degree in Computer Science, Electrical Engineering, or a related field with 10–15 years of related professional experience, or a Master’s degree and/or PhD with 5–10 years of experience.
• Proficiency with DDR-type interfaces, including DDR, LPDDR, GDDR, HBM, and eMMC, and the challenges of SoC PHY integration, timing analysis, packaging, and multi-chip integrated packaging.
• Proficiency in project management tasks for managing third-party developers.
• Broad exposure to ASIC design flows for releasing chips to fabrication, including logic synthesis, physical design, timing, DRC/LVS, formal verification, and electrical checking.
• Good understanding of Design-for-Test concepts, including DFT logic insertion, test generation, scan, and embedded core testing.
• Good communication and customer management skills.
• Willingness to travel to customer sites to support post-silicon validation.

Culture & Benefits

• Work within Central Engineering and a third-party IP management team supporting storage, security, networking, AI, communications, and hyper-scale applications.
• Eligibility for bonus and equity plans, including a new-hire equity grant and annual equity refreshers.
• Employee stock purchase plan with a two-year lookback.
• Family support programs, mental health resources, and physical health benefits.
• Recognition and service awards.
• U.S. export-control eligibility and possible export license review may apply before employment.

Hiring process

• Interviews are intended to evaluate individual experience, thought process, and communication skills in real time.
• AI tools, transcription applications, automated answer generators, and automated note-taking bots are not permitted during interviews.