Lead Product Engineer (CPU/GPU Implementation)

Location: San Jose, United States of America; onsite role

Annual salary: $119,000–$221,000 in California; incentive compensation, bonus, equity, and benefits may also apply.

Company

hirify.global develops technology and tools for high-performance and power-critical CPU and GPU implementation and methodology.

What you will do

• Lead full-chip and block-level implementation from RTL through signoff, including place-and-route, timing closure, physical verification, power analysis, and optimization.
• Apply physical design fundamentals across floorplanning, placement, clock tree synthesis, routing, timing analysis, signal integrity, IR drop, and electromigration.
• Develop scripts, utilities, and implementation methodologies to improve productivity and design quality.
• Drive PPA optimization, design convergence, benchmarking, methodology development, and large-scale CPU/GPU implementation.
• Analyze complex design issues and collaborate with architecture, RTL, verification, methodology, and CAD teams to resolve them.

Requirements

• Experience with full-chip and block-level implementation from RTL to signoff, including place-and-route, timing closure, and physical verification.
• Strong understanding of physical design fundamentals, including floorplanning, placement, clock tree synthesis, routing, timing analysis, signal integrity, IR drop, and electromigration.
• Experience with timing closure methodologies for setup, hold, power, and area optimization.
• Familiarity with low-power implementation techniques, including UPF/CPF, power gating, multi-voltage designs, clock gating, and leakage optimization.
• Automation proficiency and ability to develop scripts, utilities, and methodologies.
• Familiarity with industry-standard implementation and signoff tools.
• Strong debugging and problem-solving skills, with the ability to analyze complex design issues and drive them to resolution.
• Good communication skills and ability to work effectively with architecture, RTL, verification, methodology, and CAD teams.

Nice to have

• Experience with Python, Tcl, Perl, Shell, or other programming and scripting languages.
• Exposure to machine learning and AI-assisted optimization techniques.
• Understanding of advanced technology nodes, including 5nm and below, and challenges involving congestion, variability, power integrity, and manufacturability.
• Experience with data analytics, design-space exploration, or AI-driven optimization frameworks for improving PPA and productivity.
• Experience in PPA optimization, design convergence, benchmarking, methodology development, and large-scale CPU/GPU implementation.

Culture & Benefits

• Paid vacation and paid holidays.
• 401(k) plan with employer match.
• Employee stock purchase plan.
• Medical, dental, and vision plan options.
• Potential eligibility for incentive compensation, bonus, and equity.