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Текст:
Hirify AI/Оригинал
TL;DR
PhD Engineering Internship 2027 (Quantum Error Correction): Developing classical computing architectures, algorithms, simulations, and hardware-software models for scalable quantum error correction with an accent on decoding efficiency, resource requirements, and fault-tolerant quantum computing. Focus on reducing compute, communication, memory, latency, and power demands, evaluating software, FPGA, and ASIC implementations, and producing reproducible research code.
Location: Hybrid, Boston, Massachusetts, US; internship based at the US office in Cambridge, Massachusetts. Must be legally authorized to work in the United States for the duration of the internship.
Salary: $55.70 per hour, depending on experience.
Company
hirify.global develops quantum error correction technology to support fault-tolerant quantum computing and partners with quantum hardware providers and government agencies.
What you will do
Contribute to a research project focused on classical systems and architectures for scalable quantum error correction.
Investigate methods to reduce the compute, communication, memory, latency, and power requirements of QEC.
Develop algorithms, simulations, and architectural models to evaluate approaches and trade-offs between decoding performance, logical error suppression, and classical resources.
Explore QEC workload implementations across software, FPGA, ASIC, and other computing architectures.
Collaborate with researchers and engineers across QEC theory, decoding, software, and hardware.
Analyse results, communicate findings through technical discussions, presentations, and reports, and produce reproducible research code with documentation.
Requirements
Currently pursuing a PhD in Computer Science, Computer Engineering, Electrical Engineering, Physics, Mathematics, or a related technical field.
Research experience in at least one of quantum error correction or fault-tolerant quantum computing; computer architecture or quantum-classical systems; decoding algorithms or error-correcting codes; or FPGA, ASIC, or digital hardware design.
Experience developing computational models, simulations, or research software.
Proficiency in Python, C, C++, or another relevant programming language.
Strong understanding of computer systems and architecture, excellent analytical and problem-solving skills, and ability to communicate complex technical ideas clearly.
Ability to take initiative and work effectively with researchers and engineers from different disciplines.
Legal authorization to work in the United States for the full internship duration, including required approval for CPT, OPT, or another student employment authorization before the start date.
Availability to work full-time for 10 to 12 weeks.
Nice to have
Research experience with quantum LDPC or surface codes.
Familiarity with QEC decoding or predecoding techniques and classical resource requirements for fault-tolerant quantum computing.
Experience with hardware-software or compiler-hardware co-design.
Experience with RTL, SystemVerilog, FPGA, or ASIC development workflows.
Understanding of latency, bandwidth, or power constraints affecting quantum control and decoding systems.
Experience with scientific computing, quantum circuit simulation, or QEC simulation tools.
Contributions to academic publications, open-source software, or collaborative research projects.
Culture & Benefits
Diverse, collaborative environment spanning software and hardware development, quantum information theory, physics, and mathematics.
Regular social and cultural events, with free snacks and refreshments.
Reimbursement of reasonable approved expenses incurred as part of the role, such as travel to meetings or conferences.
Travel to Cambridge at the beginning or end of the internship and accommodation during the internship are not covered.
Employment is contingent on identity and work-authorization verification, and internship intellectual property must be assigned to hirify.global.
Hiring process
Submit a CV and cover letter by November 6, 2026.
The CV should describe education, research experience, and relevant technical skills; the cover letter should explain motivation and relevant experience.
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