Engineering Internship 2027 (Quantum Error Correction)

Location: Hybrid, Boston/Cambridge, Massachusetts, United States; based at the US office in Cambridge, Massachusetts.

Salary: $35–$42 per hour, depending on experience.

Company

hirify.global develops quantum error correction technology and works with quantum hardware providers and government agencies to advance fault-tolerant quantum computing.

What you will do

• Contribute to a research project on classical systems and architectures for scalable quantum error correction.
• Investigate methods to reduce compute, communication, memory, latency, and power requirements for QEC.
• Develop algorithms, simulations, architectural models, reproducible research code, and documentation.
• Evaluate trade-offs between decoding performance, logical error suppression, and classical resource requirements.
• Explore QEC workload implementation across software, FPGA, ASIC, and other computing architectures.
• Collaborate with researchers and engineers, analyze results, and communicate findings through technical discussions, presentations, and reports.

Requirements

• Current enrollment in a Bachelor’s degree program at second year or later, or a Master’s degree program.
• Experience in at least one of quantum error correction or fault-tolerant quantum computing; computer architecture or quantum-classical systems; decoding algorithms or error-correcting codes; FPGA, ASIC, or digital hardware design; or computational models, simulations, or research software.
• Proficiency in Python, C, C++, or another relevant programming language.
• Strong understanding of computer systems and architecture.
• Excellent analytical and problem-solving skills.
• Ability to communicate complex technical ideas clearly and work effectively with researchers and engineers from different disciplines.
• Legal authorization to work in the United States for the duration of the internship.
• Full-time availability for 10–12 weeks.

Nice to have

• Research experience with quantum LDPC or surface codes.
• Familiarity with QEC decoding or predecoding techniques.
• Experience exploring classical resource requirements of fault-tolerant quantum computing.
• Experience with hardware-software or compiler-hardware co-design.
• Experience with RTL, SystemVerilog, FPGA, or ASIC development workflows.
• Understanding of latency, bandwidth, or power constraints in quantum control and decoding systems.
• Experience with scientific computing, quantum circuit simulation, or QEC simulation tools.
• Contributions to academic publications, open-source software, or collaborative research projects.

Culture & Benefits

• Diverse and collaborative environment spanning software and hardware development, quantum information theory, physics, mathematics, and related fields.
• Global team representing more than 20 nationalities.
• Free snacks and refreshments.
• Regular social and cultural events.
• Reimbursement of reasonable approved role-related expenses, such as travel to meetings or conferences; travel to Cambridge at the start or end of the internship and accommodation are not covered.
• Intellectual property produced during the internship must be assigned to hirify.global.

Hiring process

• Submit a CV and cover letter by November 6, 2026.
• The CV should include education, research experience, and relevant technical skills; the cover letter should explain the application motivation and relevant skills and experience.
• Employment offers are contingent on identity and US work-authorization verification.