Senior Embedded Software Engineer (AI)

Location: London, UK. On-site.

Starting from £210K, plus equity. Competitive salary is commensurate with experience, skills, and location.

Company

hirify.global develops the DX-1 decode accelerator, a rack-scale AI infrastructure platform combining logic, data movement, packaging, optics, and interconnect.

What you will do

• Own an embedded software subsystem end to end, from design and simulation through FPGA prototypes, hardware bring-up, and production.
• Develop boot firmware, Linux kernel and drivers, management-plane services, and bare-metal firmware in C/C++ and Python.
• Build firmware tests for hardware-in-the-loop infrastructure, bench scripts, and device-model contributions.
• Lead cross-functional initiatives and align FPGA and Systems Software teams on scope and interfaces.
• Review code, document technical learnings, identify risks, and support reliable delivery.

Requirements

• Strong C for bare metal and C/C++ for Linux, with depth in either bare-metal/RTOS firmware on resource-constrained cores or Linux kernel and driver development, plus working competence in the other area.
• Systems fundamentals including interrupt design, synchronization with and without atomics, memory ordering, cache maintenance for shared memory and DMA buffers, and fixed memory and timing budgets.
• Shipped firmware on real hardware and debugged it at the bench using an oscilloscope, logic analyzer, JTAG, and serial console.
• Embedded Linux platform experience or clear exposure, including Yocto/OpenEmbedded or similar, U-Boot or UEFI, and device tree.
• Experience writing software-in-the-loop tests against device models or hardware-in-the-loop tests for owned firmware.
• Experience owning a subsystem from design to production, including agreeing interfaces with adjacent teams, handling failures, and delivering the subsystem for use.

Nice to have

• Bring-up of a new board or firmware for an FPGA-prototyped ASIC.
• An update flow that recovers from a failed update.
• Platform management technologies including OpenBMC, Redfish, PLDM over MCTP, I2C, SMBus, or PMBus.
• Precision timing technologies including IEEE 1588 PTP or SyncE.
• Experience with FPGA soft-core targets, accelerator or data-center hardware.

Culture & Benefits

• Meaningful stock options and ownership in the company.
• Annual Living-Local Bonus for employees living within 20 minutes of the office.
• Employer-contributed retirement plans.
• Work alongside senior engineers and collaborate with FPGA, ASIC, and Systems Software teams.
• Work includes pre-silicon development using simulation, FPGA prototypes, and hardware-in-the-loop rigs.