High Level Synthesis (HLS) Compiler Engineer (Intern))

Location: Marlow, Buckinghamshire, United Kingdom

Company

hirify.global develops programmable logic and hardware acceleration solutions using FPGA and SoC technologies.

What you will do

• Assist with developing and maintaining HLS compiler infrastructure.
• Implement compiler passes and code transformations that optimize high-level code for hardware synthesis.
• Analyze and improve compilation flows from C/C++ to hardware description languages.
• Research compiler technologies for AI computation workloads.
• Integrate and test compiler features with a focus on performance and resource optimization.
• Debug and validate compiler outputs, document work, and contribute to internal knowledge bases.

Requirements

• Pursuing a Master's or PhD in Computer Science, Electrical Engineering, Computer Engineering, or a related field.
• Academic or project experience with C/C++ programming.
• Familiarity with compiler concepts such as parsing, code generation, and optimization.
• Exposure to digital logic design fundamentals and FPGA/ASIC hardware flows.
• Good analytical, communication, and teamwork skills.

Nice to have

• Familiarity with MLIR, LLVM, or Clang.
• Exposure to HLS tools such as Xilinx Vivado HLS or Intel HLS.
• Basic understanding of Verilog or VHDL.
• Experience with Git or other version control systems.
• Coursework or internship experience in compiler development or hardware synthesis.

Culture & Benefits

• Mentorship and hands-on training from compiler and hardware engineers.
• Competitive salary, benefits, and performance-based incentive opportunities.
• Opportunities for professional growth and advancement.
• Supportive and innovative work environment.
• Canadian work experience is not required.