Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Foundation IP Design Verification Intern (Summer 2027) (VLSI/AI): Supporting verification of standard-cell libraries, memories, block-level IP, and chip-level integration with an accent on SPICE and Verilog simulation, formal verification, and AI-assisted performance prediction. Focus on developing CAD and scripting automation, analyzing post-silicon results, and performing silicon debug for semiconductor designs.
Location: Santa Clara, California, United States
Salary: $20.00–$40.00 per hour
Company
hirify.global manufactures power-efficient and high-performance semiconductors for customers in high-growth markets, including AI.
What you will do
Perform circuit and logic design verification using SPICE and Verilog simulation.
Verify standard-cell libraries, memories, block-level IP, and chip-level integration across hirify.global technologies.
Apply AI-assisted methods and engineering data to support Foundation IP performance prediction.
Contribute to formal verification, analyze results, and support post-silicon analysis and silicon debug.
Develop scripts and use CAD tools to automate VLSI design, verification, analysis, and reporting.
Document methods, results, issues, and recommendations and communicate findings to the engineering team.
Requirements
Be at least a sophomore and actively pursue a Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Science, or a related field during the internship.
Maintain an overall GPA of at least 3.0 and good academic standing.
English fluency is required for written and verbal communication.
Ability to work at least 40 hours per week during the internship.
Coursework or project experience in VLSI design, digital logic, circuit simulation, or semiconductor devices is preferred.
Familiarity with SPICE, Verilog, formal verification, electronic design automation tools, or scripting languages such as Python, Perl, Tcl, or Shell is preferred.
Nice to have
Prior internship or co-op experience.
Leadership experience in work, academic projects, or competitions.
Interest in AI-assisted engineering methods, performance modeling, post-silicon analysis, or silicon debug.
Project management, communication, planning, and organizational skills.
Culture & Benefits
One-on-one mentorship and assignments focused on student growth.
Professional development opportunities and networking with executives.
Participation in a global semiconductor internship program and entry-level talent pipeline.
Work in a safety-conscious environment supporting Environmental, Health, Safety & Security programs.
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