Staff Mixed-Signal Verification Engineer (ASIC)

Location: Barcelona, Spain or Portugal; the posting also specifies Porto, Portugal.

Company

hirify.global develops integrated power semiconductors and power delivery systems, including switching regulators, sensors, motor control, display drivers, audio amplifiers, and power management ICs.

What you will do

• Lead analog and mixed-signal verification and validation for complex ASICs and mixed-signal ICs.
• Define and document analog-digital interfaces, mixed-signal IP, and verification environments.
• Develop behavioral models of analog blocks and analyze architectural choices and trade-offs.
• Run and debug analog, digital, and mixed-signal simulations, including Monte Carlo, noise, and stability analysis.
• Support timing, input/output, DFT constraints, post-silicon validation, and characterization.
• Mentor mixed-signal engineers and coordinate multiple projects with analog, digital, layout, verification, and physical design teams.

Requirements

• For the Staff level: BSEE with 12 years of experience or MSEE with 8 years of experience.
• Strong background in transistor-level and analog/mixed-signal circuit design, ASIC development, and silicon fabrication.
• Experience with device mismatch, noise, linearity, layout techniques, and complex mixed-signal simulations.
• Proficiency with Spectre or HSPICE, Cadence ADE-L and ADE-XL, Calibre or ICV for DRC/LVS, and Verilog-AMS simulations.
• Programming experience with Verilog, SystemVerilog, and Verilog-A for behavioral modeling, plus knowledge of DFT, STA, and mixed-signal timing constraints.
• Leadership, independent execution, mentoring, and cross-functional collaboration skills.

Nice to have

• Experience with automotive and ASIL standards or power management applications.
• Knowledge of I2C, I3C, SPI, USB, or PMBUS.
• Experience with GitLab and Cliosoft SOS.
• A valid disability certificate.

Culture & Benefits

• Inclusive culture focused on diversity, equity, teamwork, fairness, and tolerance.
• Opportunity to contribute to leading-edge semiconductor products and innovation.
• Close collaboration across analog, digital, verification, layout, and physical engineering functions.