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3 дня назад

RF Technology Development Epitaxy and Integration Engineer – Principal Engineer (Semiconductor)

85 000 - 146 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
RF Technology Development Epitaxy and Integration Engineer – Principal Engineer (Semiconductor): Developing and qualifying CVD silicon and SiGe epitaxial processes and FEOL semiconductor devices in an RF technology development organization with an accent on process integration, manufacturability, performance, cost, and yield. Focus on defining epitaxial growth conditions, applying DOE and statistical analysis, solving process problems, and establishing technology design rules and test methodologies.

Location: Essex Junction, United States

Salary: $85,000–$146,000 per year

Company

hirify.global is a full-service semiconductor foundry providing design, development, and fabrication services through a global manufacturing footprint.

What you will do

  • Develop, evaluate, and qualify CVD silicon and SiGe epitaxial processes.
  • Define epitaxial growth conditions and control methodologies that meet technology performance and manufacturability requirements.
  • Develop, optimize, and qualify FEOL semiconductor devices and processes for performance, cost, and yield.
  • Drive integration optimization using DOE methodologies, statistical analysis, and yield-learning techniques.
  • Partner with unit process, failure analysis, and characterization engineers to improve device performance and yield.
  • Resolve technical process problems, support customers, and establish design rules, test structures, and test methodologies.

Requirements

  • Master’s or PhD in Electrical Engineering, Materials Science, or a related engineering or physical science discipline.
  • Hands-on experience with epitaxial growth techniques, including silicon or III-V materials.
  • At least a 3.0 overall GPA and good academic standing.
  • Written and verbal English fluency required.
  • Ability to work safely and support Environmental, Health, Safety, and Security programs.

Nice to have

  • At least two years of experience in silicon or SiGe BiCMOS FEOL or BEOL processing, III-V processing, or semiconductor process development.
  • At least two years of relevant epitaxial growth engineering experience.
  • Knowledge of semiconductor device physics and RF fundamentals, such as S-parameters.
  • Prior internship or co-op experience, leadership experience, project management skills, and strong planning and communication skills.

Culture & Benefits

  • Full-time employment opportunities for recent graduates.
  • Accelerated training in a fast-paced work environment.
  • Cross-functional collaboration and talent mobility opportunities.
  • Mentorship, networking, and leadership development.

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