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8 дней назад

Senior EDA Tools Hardware Engineer (EDA)

141 910 - 269 100$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Senior EDA Tools Hardware Engineer (EDA): Developing and maintaining transistor-level timing characterization flows and CAD infrastructure for custom IPs, embedded memories, SRAMs, register files, and compiler-generated macros with an accent on SPICE-based characterization, Liberty model generation, and automation. Focus on validating silicon-accurate timing, power, and noise models, integrating hardware for advanced-node EDA testing, and improving design automation methodologies.

Location: Hybrid work model with on-site and off-site work in Santa Clara, California; additional locations include Folsom, California, Hillsboro, Oregon, and Austin, Texas, United States.

Annual salary: $141,910–$269,100 USD.

Company

hirify.global develops semiconductor technologies and hardware products for advanced computing.

What you will do

  • Develop, test, and analyze EDA tools, characterization flows, and methodologies for power and performance optimization.
  • Build and maintain transistor-level timing characterization flows for custom IPs, embedded memories, SRAMs, register files, and compiler-generated macros.
  • Generate and validate timing, power, and noise models using SPICE-based methods, Liberty models, and industry-standard EDA tools.
  • Collaborate with custom circuit, memory design, STA, methodology, and EDA vendor teams.
  • Create and verify hardware designs and integrate components into hierarchical systems for advanced technology-node testing.
  • Support platforms, databases, scripts, and automation used for digital design, verification, physical layout, clocking, and timing.

Requirements

  • Bachelor’s degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field with 6+ years of relevant experience; or a master’s degree with 4+ years; or a Ph.D. with 2+ years.
  • 3+ years of experience with timing characterization methodologies using NanoTime, Liberate, PrimeLib, or similar tools.
  • Experience with Liberty timing models.
  • Experience with SPICE simulation, CMOS circuits, memory architecture, STA, advanced-node custom IP or memory characterization flows, and Linux scripting and automation.
  • Ability to work in the United States at an assigned hirify.global site under the hybrid work model.

Culture & Benefits

  • Hybrid work model combining on-site and off-site work.
  • Competitive annual compensation with stock bonuses.
  • Health, retirement, and vacation benefits.
  • Work on advanced semiconductor technologies and future EDA development.

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