3 дня назад
Senior Principal Test Engineer (AI Infrastructure)
205 000 - 260 000$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Senior Principal Test Engineer (AI Infrastructure): Defining and executing test strategies for complex mixed-signal silicon, high-speed connectivity products, and validation boards from early product engagement through high-volume manufacturing with an accent on test coverage, yield, quality, cost, and time-to-market. Focus on architecting custom tester hardware and software, analyzing physical-layer failures, improving manufacturing yield, and leading cross-functional technical decisions.
Location: San Jose, California, United States
Base salary: $205,000–$260,000 USD per year
Company
provides rack-scale AI infrastructure through connectivity solutions based on CXL, Ethernet, NVLink, PCIe, and UALink technologies, supported by its COSMOS software suite.
What you will do
- Define and own test strategies, specifications, and plans from product definition through high-volume manufacturing.
- Set coverage, quality, yield, test-time, and cost objectives and drive measurable product improvements.
- Partner with design and product engineering teams on testability requirements and design-for-test tradeoffs.
- Architect, validate, and characterize custom tester hardware and software for production use.
- Investigate physical-layer failures using protocol analyzers, oscilloscopes, manufacturing data, and structured failure analysis.
- Lead root-cause analysis, yield improvement, technical mentoring, and cross-functional execution.
Requirements
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
- 12–20 years of Test Engineering or Product Engineering experience spanning development through high-volume manufacturing.
- Experience developing custom test solutions and hardware for high-speed, mixed-signal products and PCBA high-volume manufacturing.
- Working knowledge of PCIe, Ethernet, DDR, NVMe, USB, and related physical-layer behavior.
- Experience with test software development, production debugging, and test-time optimization.
- Ability to work in San Jose, California, United States.
Nice to have
- Master’s or PhD in Electrical Engineering, Computer Engineering, or a related field.
- Experience designing electrical hardware boards for complex test hardware.
- Knowledge of SCAN, MBIST, SerDes, functional test, I2C, I3C, SPI, MDIO, and JTAG.
- Proficiency in C, C++, or Python for ATE programming, data processing, and test automation, plus familiarity with databases and yield analytics.
- Proficiency in Mandarin Chinese and experience mentoring engineers in a fast-paced, high-growth environment.
Culture & Benefits
- Work with design, DFT, product engineering, operations, quality, and external manufacturing organizations.
- Contribute to connectivity products for rack-scale AI infrastructure.
- Work in a fast-moving, high-growth environment that values diverse ideas, backgrounds, and experiences.
- Base salary is determined by location, experience, and compensation for similar positions.
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