Principal Hardware Engineer (Networking)

Location: Hybrid role requiring at least 2 days per week in the Sunnyvale, California office

Salary: USD 153,500–310,500 annual base salary in California, United States

Company

hirify.global develops edge-to-cloud technologies that connect, protect, analyze, and process data and applications.

What you will do

• Lead hardware system development for high-end routing platforms from feasibility and product definition through mass production and customer support.
• Develop specifications, schematics, bills of materials, prototypes, hardware test plans, and validation reports.
• Coordinate with signal integrity, power, thermal, PCB, mechanical, DFM/DFT, manufacturing, software, diagnostics, and test engineering teams.
• Review and approve validation activities including EDVT, MDVT, NEBS, HALT, safety, and EMC testing.
• Support component selection and qualification, supplier implementation and debugging, manufacturing diagnostics, and customer support.
• Provide technical leadership, mentor junior hardware engineers, and communicate project status across engineering and program teams.

Requirements

• At least 10 years of experience with board design and/or FPGA design.
• Expertise in electrical circuit and schematic design, including embedded CPU and SoC subsystems.
• Deep understanding of software, firmware, BIOS, PCB layout, signal integrity, mechanical, thermal, power, EMI compliance, manufacturability, testability, MTBF, and COGS considerations.
• Experience with multilayer high-speed PCBs, PCIe, Ethernet, I2C, clocks, high-speed SerDes, and high-speed memory interfaces.
• FPGA design experience with Verilog, FPGA simulation, and synthesis, plus Unix/Linux experience.
• BS or MS degree in Electrical Engineering or Computer Engineering; hands-on experience with oscilloscopes, protocol analyzers, and VNAs.

Nice to have

• Experience designing high-volume network routers and switches and understanding routing, switching, forwarding, switch fabrics, WAN interfaces, pluggable optics, and data center networks.
• Experience testing complex Layer 2/Layer 3 products with Ixia or Spirent Ethernet packet generators.
• Experience with Cadence Allegro PCB Designer and ePD/Viewlogic schematic capture tools.
• Python, Perl, or TCL programming and test automation experience.

Culture & Benefits

• Health, financial, and emotional wellbeing benefits for employees and their families.
• Professional development programs supporting technical expertise and career growth.
• Inclusive workplace that values varied backgrounds and individual uniqueness.
• Flexible hours to support collaboration with engineering teams across geographies.