Senior Front-End Design Engineer (AI Chips)

Location: Sunnyvale, California, with a hybrid work environment and remote option

Salary: $200,000–$290,000 annually, plus potential bonus and equity

Company

hirify.global builds wafer-scale AI processors and high-speed computing systems for model labs, enterprises, and AI-native startups.

What you will do

• Drive chip design from functional specification and micro-architecture through RTL development and synthesis.
• Integrate front-end chip designs and third-party IP for hirify.global Wafer Scale Engines.
• Work with physical design teams to achieve power, performance, and area goals.
• Collaborate with verification and DFT teams to improve functional and test coverage.
• Partner with software and system teams to optimize product performance and features.
• Debug silicon-level functional, timing, and power issues during bring-up.

Requirements

• 8+ years of experience delivering complex, high-performance RTL designs.
• Master’s degree in Computer Science, Electrical Engineering, or an equivalent field.
• Multiple successful silicon deliveries and experience with front-end chip integration.
• Experience in high-performance computing, GPU or CPU design, machine learning, or related fields.
• Experience with TCP/IP, RDMA, Ethernet, PCIe, CPU interfaces, and SerDes technology.
• Working knowledge of Python and TCL scripting tools, plus the ability to work in a hybrid environment.

Nice to have

• Experience with FPGA development tools, place and route, floor planning, and timing analysis.
• Experience managing external ASIC vendors through the product development cycle.

Culture & Benefits

• Work on a wafer-scale AI platform designed to go beyond GPU limitations.
• Opportunity to contribute to and publish cutting-edge AI research.
• Work with one of the fastest AI supercomputers in the world.
• Startup vitality combined with job stability.
• Non-corporate culture focused on individual perspectives, learning, growth, and inclusion.