Digital IP Design Engineer (AI/ML)

Location: Munich, Germany; onsite role

Company

hirify.global develops semiconductor products including automotive microprocessors, application processors, microcontrollers, networking solutions, interface components, DSP subsystems, AI/ML cores, and RISC-V IPs.

What you will do

• Develop digital IP and logic designs for complex mixed-signal SoCs according to architectural and performance requirements.
• Define IP features and interfaces and integrate digital blocks with architecture, system engineering, hardware, and software teams.
• Develop area-optimized, low-power RTL using Verilog and SystemVerilog.
• Perform lint, CDC/RDC, synthesis, timing analysis, design verification, simulation, and debugging.
• Implement design-for-testability requirements and troubleshoot issues across the development lifecycle.
• Prepare design documentation and participate in design reviews.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or a related field.
• At least 10 years of experience in IP or subsystem design.
• Strong knowledge of microprocessor architecture, interconnects, cache coherency, AMBA protocols, and memory systems.
• Hands-on experience with CPU design, proprietary cores, RISC-V, or AI/ML accelerators.
• Advanced knowledge of Verilog, SystemVerilog, C/C++, and scripting with Python, Perl, TCL, or Shell.
• Excellent written and verbal English communication skills; basic conversational German is a plus.

Culture & Benefits

• Cross-functional collaboration with hardware, software, architecture, and system engineering teams.
• Work on semiconductor products spanning automotive, processing, networking, DSP, AI/ML, and RISC-V applications.
• Responsibility for security-related tasks and work potentially covered by security certifications.
• Requires a conscious, reliable, and quality-focused approach to engineering work.