Sr Principal Design Engineer

Location: Gyeonggi-do (Seoul), South Korea

Company

hirify.global develops technology and tools used for advanced electronic design and physical implementation projects.

What you will do

• Implement physical design projects, including floor planning, power grid design, place and route, and clock tree synthesis.
• Drive timing closure, power and signal integrity signoff, EM/IR signoff, and DFM closure.
• Perform physical verification activities including DRC, LVS, and antenna checks.
• Contribute to next-generation physical design methodology and flow development, with opportunities to lead initiatives.
• Work with RTL design teams to support successful tapeouts across low-power and high-speed designs.

Requirements

• 15+ years of experience with ASIC design flows, hierarchical physical design strategies, and methodologies.
• Deep understanding of sub-micron technology issues, low-power design, DFT, static timing analysis, data skew balancing, and duty-cycle adjustment.
• Experience with EM/IR drop and crosstalk analysis, formal verification, physical verification, DFM, and P&R.
• Ability to work independently, take responsibility for varied technical tasks, and verify, test, and characterize designs hands-on.
• Good English communication skills required.

Culture & Benefits

• Work on challenging low-power and high-speed designs using the latest technology nodes.
• Collaborate closely with RTL design teams and participate in next-generation design initiatives.
• Full-time employment in the hirify.global Korea organization.