Sr. Principal Analog Design Engineer (Semiconductor)

Location: Richardson, Texas, USA

Salary: $171,000–$296,000 per year

Company

hirify.global is a semiconductor foundry providing design, development, and fabrication services for technology companies across industrial, automotive, and other end markets.

What you will do

• Develop reusable analog and mixed-signal IP for signal chains and power management, including ADCs, DACs, amplifiers, sensor interfaces, LDOs, DC-DC converters, bandgaps, and charge pumps.
• Lead transistor-level schematic design, simulation, and verification across PVT corners using advanced CMOS technologies.
• Drive architectural analysis and collaborate with digital, system, layout, product, and validation teams on noise, performance, area, and reliability trade-offs.
• Support top-level integration, verification, tape-out, silicon bring-up, characterization, and post-silicon debugging.
• Define validation, characterization, DFT, initialization, and documentation requirements for analog IP.
• Provide technical leadership and mentorship while establishing design and verification best practices for reusable IP platforms.

Requirements

• Bachelor’s or master’s degree in electrical engineering, computer engineering, or a related field.
• At least 16 years of experience delivering complex analog mixed-signal IP from concept through silicon.
• Deep knowledge of CMOS analog design, noise analysis, stability, compensation, mismatch, process variation, reliability, and low-power techniques.
• Experience with industry-standard EDA tools such as Cadence, Synopsys, and Ansys, plus Virtuoso, analog simulation environments, Perl, and Python.
• Strong analytical, debugging, silicon bring-up, laboratory, communication, and technical documentation skills.
• Ability to collaborate across global, cross-disciplinary hardware teams.

Nice to have

• Experience applying ISO 26262 and IEC 61508 across semiconductor IP and SoC development.
• Strong understanding of analog layout techniques.
• Experience driving innovation, participating in technical events, and publishing papers or patents.

Culture & Benefits

• Collaborative work across global, cross-disciplinary engineering teams.
• Opportunities to participate in internal and external technical forums and develop next-generation semiconductor IP.
• Employment is subject to applicable background checks and medical screenings.
• Equal opportunity workplace focused on diversity, inclusion, and a respectful environment.