Principal Analog/Mixed Signal CAD Engineer (Semiconductor)

Location: Santa Clara, CA; onsite five days per week. Remote and hybrid work are not available.

Expected base pay: $150,680–$225,700 per annum, plus eligibility for bonus and equity plans.

Company

hirify.global develops semiconductor solutions for enterprise, cloud, AI, carrier, networking, and connectivity infrastructure.

What you will do

• Architect, deploy, and maintain analog and mixed-signal simulation environments for advanced CMOS FinFET and BiCMOS technologies.
• Develop and support automated AMS design flows used by company-wide analog and mixed-signal design teams.
• Partner with analog designers, EDA vendors, foundry teams, and TCAD specialists to resolve simulation, modeling, and design-flow issues.
• Evaluate EDA tools and methodologies to improve design productivity, simulation performance, and accuracy.
• Define custom circuit verification checks, model quality-assurance flows, and post-layout verification processes.
• Develop scripting-based automation and productivity tools for simulation, verification, and data analysis.

Requirements

• BSEE with 10–15 years of professional experience, or an MS/PhD in Electrical Engineering with 5–10 years of industry experience.
• Experience building and maintaining analog and mixed-signal design flows for advanced FinFET process technologies.
• Hands-on experience with AMS simulation tools such as Cadence ADE, AMS Designer, Spectre, Synopsys PrimeSim, or AFS.
• Understanding of schematic capture, simulation, parasitic extraction, post-layout verification, device modeling, and high-speed analog/RF simulation behavior.
• Experience debugging complex AMS simulation and modeling issues and collaborating with cross-functional engineering teams.
• Ability to work onsite in the Santa Clara office five days per week.

Nice to have

• Experience with Cadence Virtuoso Schematic Editor, PDK integration, CDF customization, and netlisting infrastructure.
• Programming or scripting experience with Python, TCL, Perl, or SKILL.
• Experience developing custom CAD automation or verification frameworks.
• Familiarity with silicon photonics design flows and advanced circuit modeling techniques.

Culture & Benefits

• Work on advanced semiconductor, AI, networking, cloud, and connectivity technologies.
• Influence CAD strategy and infrastructure used by engineering teams across multiple product lines.
• Collaborate with designers, modeling experts, foundry partners, and EDA vendors.
• Benefits include an employee stock purchase plan, family support programs, mental health resources, and recognition awards.
• Eligibility for bonus plans, equity grants, and annual equity refreshers.

Hiring process

• Interviews evaluate individual experience, thought process, and communication skills.
• Use of AI tools, transcription applications, automated note-taking bots, or real-time answer generators during interviews is prohibited.
• Access to export-controlled technology may require an export license review under U.S. regulations.