Senior EDA Physical Design (PnR) Engineer (Semiconductor)

Location: Ho Chi Minh, Vietnam; onsite position with no remote work available.

Company

hirify.global is an embedded semiconductor solution provider developing technology for automotive, industrial, infrastructure, and IoT applications.

What you will do

• Perform physical implementation activities including floorplanning, power planning, placement, clock tree synthesis, routing, post-route optimization, and signoff preparation.
• Analyze and resolve timing closure, congestion, routing, power integrity, design-rule, and implementation-quality issues.
• Develop, validate, document, and deploy scalable RTL-to-GDSII methodologies, reusable flow components, scripts, checks, and reporting utilities.
• Evaluate new EDA technologies and conduct proof-of-concept activities, converting successful evaluations into production-ready methodologies.
• Support methodology migration, flow adoption, regression testing, user onboarding, and cross-functional technical reviews.
• Provide technical support to customers and internal teams through debugging, optimization, presentations, demonstrations, training, and issue resolution.

Requirements

• Bachelor’s or Master’s degree in electrical engineering, electronic engineering, computer engineering, computer science, microelectronics, semiconductor engineering, or a related discipline.
• 3–8 years of relevant industry experience in ASIC physical design, semiconductor implementation, EDA/CAD engineering, methodology development, or EDA applications engineering.
• Hands-on experience with synthesis, floorplanning, placement, clock tree synthesis, routing, timing closure, congestion mitigation, and power and area optimization.
• Knowledge of RTL-to-GDSII implementation, physical signoff, static timing analysis, SDC constraints, clocking strategies, and hierarchical SoC implementation.
• Experience with Synopsys Fusion Compiler, IC Compiler II, Cadence Innovus, or equivalent physical design tools.
• Proficiency in Tcl, Python, or shell scripting in Linux or Unix, together with strong analytical, communication, presentation, and customer-support skills. Strong written and verbal English is required.

Nice to have

• Advanced Tcl, Python, Perl, or shell scripting for EDA flow automation.
• Experience with physically aware synthesis, integrated Fusion Compiler flows, multi-mode multi-corner analysis, advanced-node implementation, or hierarchical SoC design.
• Experience standardizing methodologies across multiple projects or leading proof-of-concept activities.
• Familiarity with AI-assisted EDA workflows, data-driven optimization, and emerging semiconductor design technologies.

Culture & Benefits

• Collaborative work with product engineering, EDA teams, vendors, customers, and globally distributed engineering groups.
• Culture grounded in transparency, agility, global collaboration, innovation, and entrepreneurship.
• Competitive benefits package provided alongside the salary.
• Opportunities to work on semiconductor technology used in automotive, industrial, infrastructure, and IoT applications.

Hiring process

• Further compensation and benefits information will be provided during the hiring process.